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Hi,
I start having these warnings when I compile my project. I think I understand what they mean (that the delay in the data may be too large and the clock will arrive too early and clock in garbage) but I don't understand how they relate to my design. It is not obvious to me where to look and what to fix.
Project name is SystemController and I have two clock components (CPU_CLK and CPUCLK_FAST) that I use to clock an external Z80 uP. The fast clock is in Mhz, the slow clock is 100Hz.
Static timing analysis ...
Warning: sta.M0021: SystemController_timing.html: Warning-1350: Asynchronous path(s) exist from "CyBUS_CLK" to "CPUCLK_FAST(routed)". See the timing report for details.
Warning: sta.M0021: SystemController_timing.html: Warning-1350: Asynchronous path(s) exist from "CyBUS_CLK" to "CPU_CLK(routed)". See the timing report for details.
Warning: sta.M0021: SystemController_timing.html: Warning-1350: Asynchronous path(s) exist from "CPUCLK_FAST(routed)" to "CPU_CLK(routed)". See the timing report for details.
Warning: sta.M0021: SystemController_timing.html: Warning-1350: Asynchronous path(s) exist from "CPU_CLK(routed)" to "CPUCLK_FAST(routed)". See the timing report for details.
Although these do not seem to be critical at the moment, I would like to fix them.
Any hints or suggestions would be most welcome.
Marc
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I suggest to add ClockSync component to 100Hz clock to sync the clocks from different domains.
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Ah, I missed that one. Will try thanx.