ADC setup; where is the software related info / documents located

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JeSy_1305731
Level 4
Level 4
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I am using CYBL-022001 Module,  and trying to run BLE Battery Level example code that uses AtoD Converter.  Problem is all example code assumes that I am using BLE pioneer board in  CY8CKIT-042.  and examples and documentation assume pioneer board is Jumpered J2 P3.0 to J3 Vref.    Documentation in BLE_Battery_Level example says.
"When VREF is selected as reference to the ADC, and if the reference bypass is enabled, this will bring out VREF (through an internal series resistance)."  This is Incredibly confusing,  Is there any documentation on how the features of the ADC work?  I can not see why this would be useful?   Is this trying to tell me that you are supposed to be able to somehow use the chip to switch the reference around to different voltages?  If so then how are you supposed to know when the output signal is actualy at the proper level.  what if the reference does not dishcharge,  what is the charge and discharge resistance?  etc.  
I must be missing some documentation?  Where is the documentation on the chip, with its memory map, register map, and all that related stuff?
 

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JeSy_1305731
Level 4
Level 4
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Well, I guess I have some progress to report?  I am not used to having documents provided in this format.   My experience with other chip vendors, is they provide a hardware manual, and a software manual, and you read several hundreds of pages of stuff before you begin.  It appears that cypress has tried a different approach.  I just found that you fire up the PSoC Creator tool, with no knowledge of your chip and its resources, and then either open up an example project, or create a new project, and add a component from the component catalog.  In my case on the attached picture in the TopDesign schematic there is a component catalog to the far right, and you can see by the dark grey color I selected ("Sequencing SAR ADC[v2.30]") when this is done the component shows up in the lower right hand corner, and you can see by the blue link, Open datasheet  and as you would guess, this opens a software related document.  

   

Now my question changes from, where is the documentation, to "Is this the only documentation or the full set of documentation?"  The information provided is in an upper level, API, kind of interface document, which is fine and nice to help speed development, if this is the only document, I guess then I am still partially confused by what "bypass" means as in bypass or go around / disable something, or does it mean the opposite that bypass capacitor is now connected?  so in the Battery Level Measure Example, to me it looks like pin 3.0 is physically tied to ADC input,  so ADC charges 1.0uf cap to Vref, (which is set to VDDA in the component) then reads this back in. (because jumper wire connects P3.0 to Vref)  In Temperature Measure Code Example, to me it looks like nothing is physically tied to the ADC inputs? because the component shows that channel 0 and channel INJ are tied to ground, in the schematic,  but if you open the component, under the general tab, it shows Vref select:  as Internal 1.024 volts, bypassed?   this confuses me.   If the battery is 3.0v how can you use a 1.024v reference?     Also now another question, is the Die Temp always supposed to be measured at 1.024 Vref?

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Bob_Marlowe
Level 10
Level 10
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Welcome in the fascinating world of PSoCs! You finally arrived.

   

The "Bypass Cap" is used to stabilize the VRref and is connected between the pin and GND with ~0.1 to 1µF. See Datasheet 😉

   

There are TRMs with a size of a couple uf hundred pages, describing every register within a PSoC and they contain essential information - when you want to program a PSoC Creator yourself.

   

As a matter of fact: Every component has got its own datasheet, just a mouse click away. There are no secrets behind the APIs and usually there is no faster and easier way to access the component's functions. You may always have a look into the generated files: No magic, just C-language. When you are using a PSoC5 you may see that most of the components are built out of "UDBs", Universal Digital Blocks which are programmed using  Warp Verilog, a hardware definition language (HDL) which you may use for yourself if you want. There is a Component Author Guide, a Warp Verilog Reference.

   

There are tons of documents (what is the weight of a bit???) so it can turn out to be difficult finding the information you need. Cypress has provided you with a Document Manager (its on your PC) to search for what you want to read.

   

And last, not least: When you finished your project and now start to produce the required documentation (Sigh!) at a single click on "Generate Application Datasheet" you get most of it done, neatly ordered in a .pdf.

   

 

   

Bob

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JeSy_1305731
Level 4
Level 4
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Yes thank you Bob,  Just finding stuff is 1/2 the battle, the other 1/2 is specifics,  I was totally unaware that I had a document manager, I was wasting time navigating around and searching on cypress.com for documents that did not exist.  (or at least I couldn't find them).  I think the TRM is what I need, because I am digging into the code and most of the API stuff is self explanitory, or evident at a high level, until you dig into the code several layers down and see bits being flipped, and I was looking for explanation of each bit. 

   

and as I have not progressed this far yet, you still need all this low level stuff to run the debugger.  Well OK not to run the debugger, but to make the data presented by the debugger of any meaningful use when solving problems / bugs.

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