ripple on external DSM ADC reference depending on ADC clock

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Anonymous
Not applicable

Hello, I'm trying to use an external reference voltage (1.25V) in my design. The problem is that I've got a ripple (+-50mV) which depends on the conversion rate / ADC-clock. I've selectet 'Externel Vref on P0[3]', do I have to do more? It seems that this GPIO is not very high impedance or so..? If I switch the reference to internal, my external reference looks nice, so I excluded problems with my external design.

   

Had anyone ever a similar problem?

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3 Replies
HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

Didi you add a decoupling cap on P0[3]? This is recommended for the reference voltage.

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Anonymous
Not applicable

If I do so, the ripple increases. In other designs I used the 'internal bypassed' mode with external decoupling C and never had problems..

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

Sounds as if you get oscillations on your reference voltage. How is it generated, maybe it cannot cope with an external capacitance?

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