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Hi, I am using CY8C24223A and met a problem of GPIO in/out control by software.
It seems that PRT0 data can be controlled well while PRT1 data cannot.
My final goal is four digital inputs (P0[1], P0[5], P1[3], P1[7]) and six digital outputs (P0[2], P0[4], P0[3], P1[2], P1[5], P1[6]).
I must control them all by software. But I found they did not work as I expect from the documents.
So I tested simple logic; P1[5] = !P1[7], P1[6] = P1[7]
Partial source code is;
Port_1_Data_SHADE = 0;
for (;;){
PWMB = (PRT1DR & 0x128) >> 7; // read P1[7]
if (PWMB){
Port_1_Data_SHADE &= ~0x32; // clear P1[5]
Port_1_Data_SHADE |= 0x64; // set P1[6]
}else {
Port_1_Data_SHADE |= 0x32; // set P1[5]
Port_1_Data_SHADE &= ~0x64; // clear P1[6]
}
PRT1DR = Port_1_Data_SHADE;
}
But I found both actual output P[5] and P[6] were always 0 levels.
In the other hand, another logic using P0 port worked well. (P0[0] = !P0[5], P0[4] = P0[5])
Device: CY8C24223A-24PXI, developped by PSoC designer 5.4
I have tried with / without using data shade registers.
Could anyone give me suggestions?
Thank you very much for your attention in advance.
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PSoC 1
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0x32 = 0b00110010,
0x64 = 0b01100100
Better to use (a Macro could help)
PWMB = PRT1DR & (0x01 << 7); // read P1[7]
a shift >> 7 is not needed for the following if
if (PWMB){
Port_1_Data_SHADE &= ~(0x01 << 5); // clear P1[5]
Port_1_Data_SHADE |= (0x01 << 6); // set P1[6]
}else {
Bob
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Thank you very much, Bob!
I had stupid mistakes, as you suggested.
Kurinosuke
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