PSoC4 BLE Start up current

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Anonymous
Not applicable

I am having some issues with start up current demand on the PSoC4 BLE chip.

   

Basically, I have an AC supply that I rectify and this then feeds into a 100uF cap via about 200k.  The 100uF feeds the input of my 3.3V regulator, which then powers my PSoC4.  The 200k is designed to limit charge current intially to around 1mA, and I reduce this impedance to about 50k using a PNP driven from one of the GPIO pins on the PSoC once the chip is up and running.

   

The idea is that the inital 200k figure limits the start up current, but also enables me to decouple the PSoC from the incoming AC supply so I can do some analog measurements on this supply without any significant current load on it.  The PSoC turns off the PNP, and is powered from the charge on the 100uF that sits on the input to the 3.3V regulator whilst the PNP is off.  I make my measurements, then turn the PNP back on, reducing the decoupling impedance down to 50k and allowing the 100uF to charge back up and keep my PSoC running.

   

The problem I seem to be having is that the PSoC seems to try starting up when there is only about 1.2V on VDDD.  It then seems to want more current than it can get through the 200k decoupling impedance, and gets itself into this sort of "half started" mode.  This means it never boots up enough to turn the PNP on, thus giving it the extra current it needs to operate normally.

   

I've tried implementing some of the features in the Low_Power_Startup code example, which means it keeps pretty much everything turned off for the first 500msec until the chip is ready to go, which certainly helps reduce the problem.  But I'm trying to get to the bottom of how to make sure it turns on smoothly and properly.

   

I'm using the TI LP2985 chip for my 3.3V regulator, and this may be part of the problem as I think this thing enables itself once the input voltage gets above about 1.5V, rather than waiting until its got at least 3.3V at its input.

   

I can solve this problem with some changes in my hardware, but in the short term I want to know if there is a software fix to this.  i.e. - is there some setting in the PSoC that will prevent it from trying to launch into life until the voltage on VDDD is at 3.3V?

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HeLi_263931
Level 8
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No, you cannot fix this in software. At the moment when the hardware decides to start up, no software has been executed.

   

You could use a LDO with PowerGood-Output, and hold the PSoC in Reset state until the voltage is high enough. You can also use a separate voltage detector for that (TI has quite a number of them available).

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

No, you cannot fix this in software. At the moment when the hardware decides to start up, no software has been executed.

   

You could use a LDO with PowerGood-Output, and hold the PSoC in Reset state until the voltage is high enough. You can also use a separate voltage detector for that (TI has quite a number of them available).

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Anonymous
Not applicable

Thanks - I thought that might be the case.

   

As I understand it, the XRES reset it active HIGH, which means I actually need the PSU at 3.3V before I can put the PSoC into reset, and unfortunately the PSU never gets there because the PSoC is loading it too much 😞

   

I'll have to attack this one from the hardware side.

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

XRES_N is active low (and should be available on most devices). Otherwise, when XRES is tied to Vdd via a pull-up, then the PSoC will stay in reset during startup (because first the power-own-reset keeps the device in reset until voltage is high enough, and then XRES is already active).

   

You could use a low-power timer with open-drain output to delay the de-assertion of XRES, or a LTC6993 driving a transistor.