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I am using CYUSB3KIT-003 and the CYUSB3ACC-005 to work with Xilinx ZC702 to stream video into PC.
I realize the FPGA serves as a master role in the GPIF port.
I am reading the AN65974 but how does the GPIF communicate to the FPGA how many bytes the PC has or wants?
How do the control packets get into the FPGA?
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Hi,
The flow control between FX3 and FPGA is such that, whenever FX3 has buffer memory availabl, FPGA sends the data and holds when FX3's DMA buffer memory is filled. The slavefifo interface has no idea of how much data the PC needs.
When PC requests for a specified amount of data, it is driven from FX3;s DMA Buffers and more and more data will be supplied by the FPGA as the PC starts consuming the data from FX3's DMA Buffers.
Regards,
- Madhu Sudhan
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Thank you.
When integrating FX3 into my FPGA based camera system, to do video control and stream, how do we move control instructions to/from PC into FPGA? Write my own console control just like what we do in UART host control interface?
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Thank you.
After worked on a different project and some study on FX3 designs. I guess I understand it better now.
I will use the FX3.I2C for that.