[Resolved] Max input voltage on ADC

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Anonymous
Not applicable

Hi all,

   

I'm designing a board, using the SAR ADC of the PSoC4 with an external Vref of 2.5V. I'm measuring a 10k poty ranging from 0V to 2.5V when it's connected, that's all good. For information, the PSoC4 is powered in 5V (Vddio/Vddd/Vdda).

   

Although I'm having a question: is there a risk of damaging the ADC if the poty voltage exceeds 2.5V? I'm aware that the ADC will read full-scale for anything above 2.5V, but that's not an issue.
The reason is, when the poty gets disconnected, the pullup will pull the voltage up to the 5V rail. This is not a use case, so the measured value is garbage anyway, but I'm more concerned about potential risk to the device.

   

The following Vdd specs table makes me believe that it is not an issue

   

Thanks!

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1 Solution
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Input (to any pin) may not exceed Vdda (which is >= Vddd), Vdda maximum is 5V

   

So there will be no issue with your implementation.

   

 

   

Bob

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2 Replies
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Input (to any pin) may not exceed Vdda (which is >= Vddd), Vdda maximum is 5V

   

So there will be no issue with your implementation.

   

 

   

Bob

Anonymous
Not applicable

Okay Bob, thanks for the confirmation.

   

I just pictured the SAR ADC which will try very hard converting this 😉

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