UVC_AN75779 fails to work after I change the data-width to 32-bits.

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Anonymous
Not applicable

Hi Cypress, 

   

I am experimenting with FX3 application note AN75779. 

   

I use FPGA to replace the image sensor and removed all sensor related I2C transactions in FX3 firmware. 

   

The FPGA generates 32-bit data and follows the FV/LV protocol in AN75779. With original fx3_uvc.cydsn I could stream in the LSB of my data. 

   

 

   

To adjust for the data width I changed that to 32 bit in fx3_uvc.cydsn. I also changed step size in LD_ADDR_COUNT & LD_DATA_COUNT to 4. 

   

It failed to work after that change. 

   

What should I do now? 

   

Thank you! 

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1 Solution
MaBa_1857101
Level 1
Level 1
First solution authored First like given Welcome!

hi,

   

Check your system Clock frequency. you use 32-bit so enable the SysClk400 in CyU3PDeviceInit.

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2 Replies
MaBa_1857101
Level 1
Level 1
First solution authored First like given Welcome!

hi,

   

Check your system Clock frequency. you use 32-bit so enable the SysClk400 in CyU3PDeviceInit.

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Anonymous
Not applicable

Thank you. It works now. 

   

How long is the latency from INTR_CPU to CyU3PDmaMultiChannelCommitBuffer? With 100MHz and 16KB buffer, one would expect to interrupt to hit & commit every 40us. Is the CPU fast enough to add header in that 20000 cycles? 

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