5 Replies Latest reply on Nov 25, 2016 4:54 AM by VasanthR_91

PSoC4 deep sleep mode

masac_1154256 Aug 18, 2017 3:02 PM

Gents, I have a board with a PSoC4 and a PSoC5 processors present. I am attempting to place the PSoC4 into deep sleep mode using the set up in AN86233 (PSoC4 Low-Power modes), however, I am not seeing the expected results.

Here's my setup:

I have a switch that toggles the mode from normal to deep sleep and an LED that monitors the mode type (as mentioned in AN86233).

I have a DVM monitoring the total current to the board, the project was built in release mode, on the project .cydwr screen and System tab I set the programming\Debugging debug select to GPIO.

The psoc4 project uses the AN86233_PowerModes project with the only modifications being the pins used for the switch and the LED otherwise it's the exact code.

The MiniProg3 programmer is not connected during the test.

My DVM has a shunt resistor of .5 ohms.

Here are the results:

Starting up with the psoc4 in normal mode the combined load is 13.43mA.

Switching to deep sleep the load changes to 12.8mA.

Switching back to normal mode results in 13.43 mA as expected.

So that leaves 2 possibilities:
1. either the psoc4 is not going into deep sleep mode or

2. it is in deep sleep mode but my measurement technique is fouling things.

Any ideas?

Thanks,

Mark

Obviously

1. Re: PSoC4 deep sleep mode

rola_264706 Oct 28, 2016 11:41 AM (in response to masac_1154256)

Please post your code so we can check it.
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2. Re: PSoC4 deep sleep mode

rola_264706 Oct 28, 2016 12:27 PM (in response to masac_1154256)

Also what the part number of your meter?
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3. Re: PSoC4 deep sleep mode

epr_1639216 Oct 28, 2016 3:16 PM (in response to masac_1154256)

Things I would check:

1) Under the Design Wide Resources -> System, make sure the "Debug Select" setting from "Programming/Debugging" is set to GPIO, and not SWD (SWD draws extra current asynchronously)

2)Make sure you are putting components to sleep as well when your code goes to sleep, as they are all powered/run asynchronously to the CPU

3)TTL pins on the board are generally less lossy when all left at Logic-level-high instead of Logic-level-low (5 volts versus 0 volts)

4)Double check that your DVM is reading/working as it should on another device/resistor if all else fails.
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4. Re: PSoC4 deep sleep mode

masac_1154256 Nov 1, 2016 12:23 PM (in response to masac_1154256)
Gents, here's the project. I'm using a Fluke 87 DVM.

A4CM_psoc4.cywrk_.Archive01.zip 2.4 MB
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5. Re: PSoC4 deep sleep mode

VasanthR_91 Nov 25, 2016 4:54 AM (in response to masac_1154256)

Hi Mark,

I think your FRAM_I2C custom component is causing the issue. It is better to stop the device before going to sleep mode. Once you are coming out of sleep, you can turn start it. Another factor can be the I2C pins. The GPIOs can continue to drive the external circuitry when the PSoC device is in a low-power mode. This is helpful when you need to hold external logic at a fixed level, but it can lead to wasted power if the pins needlessly source or sink current. So it is better to configure all unused GPIOs to Analog HI-Z unless there is a specific reason to use a different drive mode. Use the _SetDriveMode() API function.

/* Set MyPin to Alg HI-Z for low power. */

MyPin_SetDriveMode(MyPin_DM_ALG_HIZ);

This should solve the problem. Please refer this application note while using low power mode : http://www.cypress.com/documentation/application-notes/an86233-psoc-4-low-power-modes-and-power-reduction-techniques

Best Regards,
Vasanth R S
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