- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
On the CYUSB3KIT-003 EZ-USB® FX3™ SuperSpeed Explorer Kit where do I connect the "SLCS#, SLRD#, SLWR#, SLOE#, and A[1:0] signals? The DQ[15:0] are marked but all other signals are labeled as CTL[12:0]. The GPIFII designer assigns GPIO_xx pins (Ex: GPIO_17 for SLCS#) but I cant find any information how the GPIO pins are connected to the J6 or J7 40 pin headers.
I checked the schematic and the pins are marked as CTL[12:0] and not GPIO_xx.
Solved! Go to Solution.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
There is a super speed Explorer kit user guide with GPIF connector pinout listed in the hardware section.
There is a table in the device data sheet listing GPIO/CTLx the "CYUSB303X" pdf, go to GPIOs
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
There is a super speed Explorer kit user guide with GPIF connector pinout listed in the hardware section.
There is a table in the device data sheet listing GPIO/CTLx the "CYUSB303X" pdf, go to GPIOs
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks. I found it. It is in the CYUSB303X datasheet.