change UART settings on the fly

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RaAl_264636
Level 6
Level 6
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Hi,

   

 

   

does anyone know if the UART settings can be changed on the fly? I think I found a way to change the baudrate, but I doesn't see a direct way to modify the number of data bits, etc.

   

 

   

Regards,

   

 

   

Ralf

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HeLi_263931
Level 8
Level 8
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You can use UART_WriteControlRegister to control some aspects of the configuration. AFAICS there is no way to control the number of data bits.

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HeLi_263931
Level 8
Level 8
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You can use UART_WriteControlRegister to control some aspects of the configuration. AFAICS there is no way to control the number of data bits.

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RaAl_264636
Level 6
Level 6
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Hello hli,

   

 

   

thank you for the response. Too bad that there's no way to change the basic settings. I'll check if there's a more flexible solution.

   

 

   

Regards,

   

 

   

Ralf

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HeLi_263931
Level 8
Level 8
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Provided you have enough UDBs left: create multiple UARTs, each with the appropriate bit length, and switch their pins with a MUX to the output pins.

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RaAl_264636
Level 6
Level 6
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Hi Hli,

   

 

   

that would be the quick solution for proof of concept. For the end application, I want to use a more flexible UART. So I have to dig into the UART component source code and check if it can be modified.

   

 

   

Regards,

   

 

   

Ralf

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HeLi_263931
Level 8
Level 8
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Probably not - I would assume that the number of data bits affect how the UART is synthesized into hardware.

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RaAl_264636
Level 6
Level 6
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That would be worst case 😞

   

From such basic peripherals like UART, SPI, etc. I'd expect that they are run-time configurable as they are on other MCUs. My problem is that for the current project I don't know at which settings the attached device will communicate, it depends on the customer.

   

I'll check the UDB capabilities...

   

 

   

Regards,

   

 

   

Ralf

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Anonymous
Not applicable

You should look at PSoC® 5LP Architecture TRM document

   

http://www.cypress.com/documentation/technical-reference-manuals/psoc-5lp-architecture-trm

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