external SRAM - access via ARM9 and USB?

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Anonymous
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I need the CYUSB3KIT-003 with the external SRAM onboard. I know, just 1 KB access-able (I had to design own PCB or use extension header,
512 KB is needed).

   

My questions are related to:
- how can I use the external SRAM as buffer (SW FIFO) between ARM9 and USB?

   

The ARM9 should be able to write data (e.g. from SPI) to external SRAM, via USB I want to read this SRAM (SRAM example works,
a good starting point, please see following questions).

   

a) Is my understanding correct? Using external SRAM needs GPIF interface. Even for the ARM, it must be used, configured.
    Without a GPIF design - ARM9 would not be able to access external SRAM?
b) What is the address mapping? How could ARM9 access external SRAM (hoping it is just a memory region/window to see external SRAM
    if GPIF is initialized)?
c) Is there an arbitration? How does it work if ARM9 tries to write, but USB wants to read?
    As I understand the SRAM_FX3 example (it is actually called "cyfxsrammaster") - GPIF must be initialized via USB. And: in order to read
    (after a write) - a special USB transaction on Endpoint 0 must be done, otherwise the Read/Write Endpoints are not available.
    But, does it result in a "race condition"? ARM9 wants to write, but USB wants to read - the sequence to change from write to read via USB
    could conflict with ARM9, concurrent access?
d) Can ARM9 initialize GPIF, so that it is not needed to use this special sequence to do via USB?

   

How can I use external SRAM (later on own board) as a buffer (like Dual Port) between ARM9 and USB?
What to bear in mind?
What to consider for FW design (memory map for ARM9, mutual access to handle race conditions, HW arbitration, e.g. ARM could put to wait
when USB access at the same time)?

   

Thank you for any guidance.

   

Torsten

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1 Reply
Anonymous
Not applicable

Hello,

   

1) Yes, GPIF Interface is needed, if it is a parallel SRAM. For serial SRAMs the serial interfaces of FX3 can be used (say SPI)

   

2) The GPIF Lines can drive out address. In the example project, A counter is initialized with address staring from 0 upto 255 and driven out on address lines. Please refer to the state machine project (SRAM.cydsn) which can be opened using GPIF Designer tool.

   

3) ARM9 (FX3) is a slave. The PC is the USB Master. The PC can send EP0 commands for read/write as per this example. Note that EP0 commands are control requests that have a Data phase (it can be either read or write). So only when the given date has been completely sent from PC to SRAM or SRAM to PC, the PC can send the next command. 

   

The PC cannot send Read command when write is still going on and vice versa.

   

4) Yes, it can do of it's own without the USB. You just need to call the appropriate APIs for GPIF Initialization.

   

5) SRAM cannot come between USB and ARM9. Only PC <> ARM9 <> SRAM is possible

   

Regards,

   

- Madhu Sudhan

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