4 endpoint in slave sync fifo

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Anonymous
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Hi

   

I want have a firmware with 4 endpoints. Can I have an example in slave fifo sync by 4 endpoints?

   

Thanks

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Anonymous
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Please refer to the firmware example of AN65974. We have used 2 endpoint (one to transfer in other to transfer data out). You can define 2 more similar endpoints in the descriptors and accordingly create dma channels to and from the P-port.  Is this what you are looking for? If so, please try and let us know if you face any problem.

   

Please note that you need to write your host application and the FPGA (master) code to read and write from appropirate sockets. The same GPIF project can be used as we are doing in_address as well. So, the current address of the socket will be sample from the FPGA in every read and write state.

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Anonymous
Not applicable

Please refer to the firmware example of AN65974. We have used 2 endpoint (one to transfer in other to transfer data out). You can define 2 more similar endpoints in the descriptors and accordingly create dma channels to and from the P-port.  Is this what you are looking for? If so, please try and let us know if you face any problem.

   

Please note that you need to write your host application and the FPGA (master) code to read and write from appropirate sockets. The same GPIF project can be used as we are doing in_address as well. So, the current address of the socket will be sample from the FPGA in every read and write state.

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