Counter problems

[duno_297731]

I want to use the software controllable counter, but I want it to count based on a clock coming into an IO pin, and not depend at all on the system clock.  the clock to the counter will be going near the same speed as my system clock, so using the clock and count pins would be error prone.  if I use the basic counter, I can use the external signal as a clock and it works fine.  I want that same functionality, but with software control (setting TC and Compare values) and compare output.  how can I achieve this?

I'm working with the CY8CKIT-059

[duno_297731]

I think the PWM module will allow me to do what I want, but I am not sure how to get the PWM module to function with an external digital signal as a clock.  anyone know how to do that?

[odissey1]

Psoc4_guy, UDB based PWM or Counter requires sinchronization of the input clock with Master clock (basic counter does not - it is PLD based). I believe that sync requires input signal frequency to be no more than half of Master clock. If external frequency is higher than 1/2 than master clock, then it will be chopped by internal sync block. Not sure how the Fixed Function PWM responds to external clock

PS. Fixed Function components can't be driven by external clock. Check this thread http://www.cypress.com/forum/psoc-4-architecture/external-clock-timer   

[odissey1]

        Another approach: since BasicCounter is partly working for you, consider modifying the Verilog code by adding extra functionality and API.