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Hello,
I have modified the project example slfifosync in order to support 8b GPIF (it comes with support for 32 & 16, but not 8 ?!) as described after.
My issue is that it works like a charm (communicate without errors with my FPGA board on all channels) when I compile for 32 or 16 bits but does not for 8bits and it keeps throwing "CYU3P_PIB_ERR_THR0_DIRECTION" errors when I try to transfer data from fpga to usb.
The fpga bitstream and host application are the same for all my 32/16/8 trials, only the firmware slightly differs. Does anyone experienced the same when gpif is 8b ?
These are the modifications I did for supporting 8b in slfifosync example:
cyfxslfifosync.h:
/* Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT = 0 for 16 or 8 bit GPIF data bus.
* Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT = 1 for 32 bit GPIF data bus.
*/
#define CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT (0)
/* 8/16 bit GPIF Configuration select */
/* Set CY_FX_SLFIFO_GPIF_8_16BIT_CONF_SELECT = 0 for 8 bit GPIF data bus.
* Set CY_FX_SLFIFO_GPIF_8_16BIT_CONF_SELECT = 1 for 16 bit GPIF data bus.
*/
#define CY_FX_SLFIFO_GPIF_8_16BIT_CONF_SELECT (0)
cyfxgpif_syncsf.h:
GPIF II configuration register values.
*/
uint32_t Sync_Slave_Fifo_5Bit_CyFxGpifRegValue[] = {
0x80000380, /* CY_U3P_PIB_GPIF_CONFIG */
#if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
#if (CY_FX_SLFIFO_GPIF_8_16BIT_CONF_SELECT == 0)
0x00001003, /* CY_U3P_PIB_GPIF_BUS_CONFIG */
#else
0x000010A7, /* CY_U3P_PIB_GPIF_BUS_CONFIG */
#endif
#else
0x000010AC, /* CY_U3P_PIB_GPIF_BUS_CONFIG */
#endif
Thanks
Solved! Go to Solution.
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Hello,
I think I figured out what is wrong: In the GPIFII Designer when you choose 16b or 32b the addressbus is always GPIO29:28
But in the case you select 8b the addressbus is changed into GPIO8:9
This information is nowhere inside the application note AN65974, it should be better documented I think.
I will try tomorrow if it works after changing the fpga's pinout.
EDIT: I confirm that after updating the fpga's pinout with the proper settings for addressbus when gpifII is 8b the error is gone.
--
Thierry
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Hi,
Did you change the watermark value in CyU3PGpifSocketConfigure API? If not, please refer the AN65974 Applcation note for more details on watermark value.
Regards,
- Madhu Sudhan
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Hi,
Thank you for the answer, but I do not use partial flags, only full/empty flags, and the error happens since the first transfer, so I do not see how watermark can affect this.
In addition the error is not overrun or underrun but wrong thread direction.
Best regards,
--
Thierry
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Hello,
I think I figured out what is wrong: In the GPIFII Designer when you choose 16b or 32b the addressbus is always GPIO29:28
But in the case you select 8b the addressbus is changed into GPIO8:9
This information is nowhere inside the application note AN65974, it should be better documented I think.
I will try tomorrow if it works after changing the fpga's pinout.
EDIT: I confirm that after updating the fpga's pinout with the proper settings for addressbus when gpifII is 8b the error is gone.
--
Thierry
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Hi,
Thanks for your feedback. We will make sure to include this defect in the next version of the App Note.
Regards,
- Madhu Sudhan