PsoC Creater copy and chane Cypress Component

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Anonymous
Not applicable

I need a NRZI UART.My idea is to copy of the Cypress UART 2.50 and 
change one line in the Verilog file to get out the tx_clk for start and stop bit.
I can change the orginal B_UART_v2_50.v file, but i do not how i get
a own component from this.
Can somebody help me.

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1 Solution
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

To make own components have a look into the "Component Author Guide". Not quite easy, but doable.

   

 

   

Bob

View solution in original post

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9 Replies
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

To make own components have a look into the "Component Author Guide". Not quite easy, but doable.

   

 

   

Bob

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Anonymous
Not applicable

Hi Bob

   

I try something to copy the cypress component UART 2.50 but i get an error :Can't find 'NRZI_UART' in library 'work' with path 'lcpsoc3'

   

what it mean?

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Anonymous
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the way: 

   

1. copy B_UART_v2_50.cysym and B_UART_v2_50.v from programm path to a local path.

   

2. add component item B_UART_v2_50.cysym and B_UART_v2_50.v

   

3.change properties of component01.cysym Collection Catalog Placement to My/com/

   

4. use component01 in TopDesign.cysch. put input ports at rx,cts_n,reset,clock.

   

5. build project an get the error.

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Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Did you write the API .c and .h files? did you use `INSTANCE_NAME` frequently as the manual says?

   

 

   

Bob

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Anonymous
Not applicable

i have change the INSTANCE_NAME in component01\component01.cysym 

   

but the error: Can't find 'component01' in library 'work' with path 'lcpsoc3'. is the same

   

where is the place for `INSTANCE_NAME`

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Anonymous
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please can you tell me what do .

   

i want to change line 727 in file  B_UART_v2_50.v 

   

from:  if((tx_state == UART_TX_STATE_SEND_DATA) & !reset_reg)

   

to:  if(!reset_reg)  

   

and psoc creator to use this file outside the component catlalog , i have to check in this file in archive.

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Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Very quick and dirty solution:

   
        
  • Build your project
  •     
  • in Workspace explorer move the generated source UART folder to your source folder
  •     
  • Configure UART, choose "Built-in" tab
  •     
  • Set CY_SUPPRESS_API_GEN to true
  •     
  • Change lines in UART.c
  •     
  • Build project
  •    
   

 

   

Bob

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Anonymous
Not applicable

Hi Bob

   

I try your solution, but always the same error occurs

   

 

   

Elaborating Design...
HDL Generation...
Synthesis...
ADD: fit.M0002: error: Can't find 'component01' in library 'work' with path 'lcpsoc3'.

   

thanks

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Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

It is working at my side. Something left over from previous tries?

   

Start a new example, "component01" should not exist, the qnd is not working with components.

   

 

   

Bob

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