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Our project need an accurate 600Hz PWM output,599.9~600.1 is allowed.
But we tried several ways,and failed to get it.
1.
aclk_configure(512000, ACLK1, ACLK_FREQ_24_MHZ);
adjust pwm initail value to get 600Hz,
pwm_start(ID, PMU_CLK, toggle_value, 155); ~600.4
pwm_start(ID, PMU_CLK, toggle_value, 154); ~599.7
2.
aclk_configure(307200, ACLK1, ACLK_FREQ_24_MHZ);
adjust pwm initail value to get 600Hz,
pwm_start(ID, PMU_CLK, toggle_value, 0x200); ~600.9
pwm_start(ID, PMU_CLK, toggle_value, 0x1FF); ~599.8
3.
I tried to modify input clock of PWM slightly,but it seems the output frequency is not modified.
aclk_configure(307308, ACLK1, ACLK_FREQ_24_MHZ);
pwm_start(ID, PMU_CLK, toggle_value, 0x1FF); ~599.8
How can I get an accurate PWM output frequency?
Solved! Go to Solution.
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I produced 600.1 Hz using the following configuration:
aclk_configure(360000, ACLK1, ACLK_FREQ_24_MHZ);
pwm_start(PWM2, PMU_CLK, 1000, 0x3ff - 605);
I was able to reproduce all of your numbers, so I assume our logic analyzers are both accurate.
A little trial and error landed me in the right spot. It's tricky to land the exact frequency you want given the use of whole number registers and their inability to perfectly divide out the clock--there's no documented way of doing this, you just have to see what works.
This configuration should leave you enough room to control the duty cycle with some degree of accuracy: 418 - 1023.
Jacob
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Just thinking out loud here. Does using LHL_CLK (128kH clock) improve things?
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I‘m afraid LHL_CLK is not suitable.
If I use LHL_CLK (128kH clock) as pwm clock,I must set initail value about 800 to get 600Hz.
So I can only set toggle value from 800~0x3FF.
Because I need to adjust pwm duty ratio in our application,the accuracy will be not enough.
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Does it work for you? I didn't test it. But hope it helps.
aclk_configure(480000, ACLK1, ACLK_FREQ_24_MHZ);
pwm_start(ID, PMU_CLK, toggle_value, (0x3ff - 0x320)); // 480k/800=600?
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I produced 600.1 Hz using the following configuration:
aclk_configure(360000, ACLK1, ACLK_FREQ_24_MHZ);
pwm_start(PWM2, PMU_CLK, 1000, 0x3ff - 605);
I was able to reproduce all of your numbers, so I assume our logic analyzers are both accurate.
A little trial and error landed me in the right spot. It's tricky to land the exact frequency you want given the use of whole number registers and their inability to perfectly divide out the clock--there's no documented way of doing this, you just have to see what works.
This configuration should leave you enough room to control the duty cycle with some degree of accuracy: 418 - 1023.
Jacob