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I am trying to use the port 10 as an input on the Pioneer Kit L. But for some reason I am not able to use them since something, or for some reason they are high every time. I believe the U10 (the level translator) has something to do. And I am wondering if removing this level translator would fix this? Why are these ports high (from 10.0 to 10.3) high when nothing is connected to the level translator?
Thank you!
Enrique
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PSoC 4 Architecture
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Hello Enrique,
The level translator has an internal pull-up resistor as mentioned in the datasheet (Page 19) -
This might be the reason why a logic high is observed when the Port 10 pins are in high impedance state. But I was still able to use it as an input pin. When the pin is pulled down, logic 0 is detected.
Hope this helps,
Thanks and Regards,
Rakshith M B
Rakshith M B
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Hello Enrique,
The level translator has an internal pull-up resistor as mentioned in the datasheet (Page 19) -
This might be the reason why a logic high is observed when the Port 10 pins are in high impedance state. But I was still able to use it as an input pin. When the pin is pulled down, logic 0 is detected.
Hope this helps,
Thanks and Regards,
Rakshith M B
Rakshith M B