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How many mixed of HyperRAM / HyperFlash can exist on the same bus? What are the limitations and critical points?
e.g.
2x HyperRAM + 1 x HyperFlash
1x HyperRAM + 2 x HyperFlash
Thx.
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Hi,
There are no limitations from the device side. every chip will have a separate CS pin which can be used to select any required device. The controller drive strength will be the limiting factor for this selection and what are the design requirements. If the controller can support more fan out you can have more chips sharing the address and data lines. Both the configuration that you have mentioned as an example, we have seen them implemented. You can also check our layout guidelines for more information.
Thanks,
Pradipta.
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Hi,
There are no limitations from the device side. every chip will have a separate CS pin which can be used to select any required device. The controller drive strength will be the limiting factor for this selection and what are the design requirements. If the controller can support more fan out you can have more chips sharing the address and data lines. Both the configuration that you have mentioned as an example, we have seen them implemented. You can also check our layout guidelines for more information.
Thanks,
Pradipta.
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Thank you Pradipta.
Take care.
Ali