The FX3/CX3/FX3S comes up as "Cypress Benicia USB Boot Device" instead of "Cypress FX3 Bootloader Device" and I2C EEPROM was successful

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RaGa_4519521
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In our own hardware design (with usb-c connector) the FX3/CX3/FX3S comes up as "Cypress Benicia USB Boot Device" instead of "Cypress FX3 Bootloader Device" and we were able to program successfuly the cycx3_uvc_ov5640.img firmware (accordig to Control Center: "Programming of I2C EEPROM Succeeded") via I2C EEPROM. But the device always comes up with Cypress Benicia USB Boot Device.

We have just checked the PMODE[2:0] states and:

Trouble Shooting Guide for the FX3/FX3S/CX3 Enumeration - KBA222372

and:

AN76405

and:

Forum Thread

It is seems that it is a hardware issue because in FX3 DVK everything goes OK.

Any other help?

Thank you very much in advance!

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Hemanth
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Hi Raul,

I see that C5 pin (RESET#) is left open. 1ms (minimum) POR is needed to provided to this pin.

Please test it providing the same and let me know the result.

Regards,

Hemanth

Hemanth

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Hemanth
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Hi,

As mentioned in your post, did you make sure that PMODE pins are Z11 (PMODE2 - float; PMODE1 & 0 - Logic high)? In your schematic did you pull PMODE1 & 0 pins to 3.3V through 10K resistor?

Are all the schematic recommendations from AN70707 followed? Can you post your schematic here?

Regards,

Hemanth

Hemanth
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Hi Hemanth!

Thank you very much for your answer.

Yes, I have measured 3.3V in PMODE1 & 0 pins and we have followed AN70707, we don't know what is wrong. Please, check this part of our schematic:

pastedImage_3.png

I attach the CX3 part:

pastedImage_0.png

We are using CYUSB3064-BZXC instead of CYUSB3065-BZXI, but I suppose it is not a problem.

Thank you again for your help Hemanth!

Best regards,

Raul.

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Hemanth
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Hi Raul,

Does CLK_10.2MHZ_MIPI and CLK_10.2MHZ_CX3 come from a buffer output?

Regards,

Hemanth

Hemanth
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Hi Hemanth!

Thank you for your reply.

I suppose that you mean 19.2 MHz

Yes! They come from here:

pastedImage_0.png

Thank you again for your help Hemanth!

Best regards,

Raul.

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Hemanth
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First like given First question asked 750 replies posted

Hi Raul,

I see that C5 pin (RESET#) is left open. 1ms (minimum) POR is needed to provided to this pin.

Please test it providing the same and let me know the result.

Regards,

Hemanth

Hemanth
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Hi Hemanth,

Thank you very much for your answer!

The CLK_19.2MHZ_MIPI and CLK_19.2MHZ_CX3 output buffer is OK, isn't it?

I have done some testing on FX3 DVK and it seems to be the C5 pin (RESET#) as you say.

Is there any other solution than completely redo and manufacture the hardware?

Thank you again!

Best regards,

Raul.

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Hemanth
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Hi Raul,

The CLK_19.2MHZ_MIPI and CLK_19.2MHZ_CX3 output buffer is OK.

I do not think there is any other way to work around this situation without connecting reset pin as required.

Did you observe similar behavior with FX3 DVK when reset pin is floated.

Regards,

Hemanth

Hemanth
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Hi Hemanth,

Thank you very much for your answer!

Yes, I observed the same behaviour with FX3 DVK when reset pin is floated.

I see There is no way to re asign the pint reset (to a GPIO port, for example) via firmware, no?

But, perhaps, I can (and I should) check that the rest of the hardware is OK because maybe there are other things wrong...and of course, I don't want to have more problems if I redo and redesign the hardware .

Could I test/debug the camera module that I have, taken into account this problem? Perhaps...using the RAM memory or the reset button of the USB Control Center.

Reset_device.png

Thank you again Hemanth!

Best regards,

Raul.

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Hemanth
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Hi Raul,

Yes it is not possible to assign reset pin to GPIO.

From your first comment in this thread, you had mentioned that control center displayed - EEPROM programmed successfully. I am not sure if the programming was successful. But assuming it was successful, you can make your PMODE connections to F1F and see if CX3 can boot from the firmware in the EEPROM.

Also, when you mention FX3 DVK, can you let me know which kit you have?

Regards,

Hemanth

Hemanth
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Hi Hemanth,

Yes, the control center displays - EEPROM programmed successfully, but the CX3 can't boot from the firmware in the EEPROM (it doesn't care the PMODE connections), always:

Cypres BENICIA USB Boot Device

I trying to get any ideas from this:

https://www.cypress.com/comment/82146#comment-82146

Maybe I could wire the RESET port to the C1 port (GPIO) : "2nd option would be to wire a GPIO to #Reset-pin of FX3 and pull the GPIO to LOW to execute a hard reset." But, of course, I thinks it is impossible to wire something under FX3 without remanufacturing the hardware.

In my hardware I have a OV5640 camera module and I need to tested it despite this big issue.

I am testing with this FX3 DVK (why?):

Cypress EZ-USB® CX3 camera reference design kit (RDK)

Thank you again Hemanth!

Best regards,

Raul.

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Hemanth
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Hi Raul,

1. I am not sure if EEPROM is programmed correctly? - Did you by any chance try to read it by some means and check if it has right firmware?

2. If you cannot read that, then you can try to wire I2C lines of your board externally to Denebola kit's EEPROM with valid firmware + connect PMODE of your board to I2C with fallback.

If the above test fails, I think bootloader is not executing properly, as POR was not provided.

I enquired about the DVK just for my reference.

Regards,

Hemanth

Hemanth
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Hi Hemanth,

Thank you very much for your answer!

Yes, using the DVK I am sure that the EEPROM is programmed correctly but unsoldering the reset circuit it doesn't care the PMODE connections always:

Cypres BENICIA USB Boot Device

Definitely, of course, C5 pin (RESET#) POR is needed. No other solution.

I will redo and redesign the hardware. Previously I should check if there are other possible problems.

Could I send you a private email attaching the schematic in order to prevent other possible issues?

Thank you very much again Hemanth!

Best regards

Raul.

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