CX3/FX3 cpu timing

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omco_594686
Level 3
Level 3
Welcome!

Dear support team,

On our next project we need to perform some pre-processing of the image before sending it over USB to the host.

Where can I find information about clock-cycles of the processor operations? like bitwise, or, and etc..

In addition, just to be sure - the cpu clock is 200Mhz without option the change it. Am I right?

Omri.

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YashwantK_46
Moderator
Moderator
Moderator
100 solutions authored 50 solutions authored 50 likes received

Hello Omri,

"In addition, just to be sure - the cpu clock is 200Mhz without option the change it. Am I right?"

=> The CPU clock can go beyond 201MHz (or even 192MHz if the  setSysClk400 = CyFalse where input clock would be taken as 384MHz) but for that the input clock source need to be changed to either a 26MHz or 52MHz input clock or crystal, the sys_clk would be set to 416MHz and the CPU clock (which is sys_clk/2) would be 208MHz.

The CPU clock can be configured to be less than 200MHz by changing the divider values which are being sent to the CyU3PDeviceInit() API.

The clock structure that is passed to the CyU3PDeviceInit() has the below structure and explanation:

pastedImage_0.png

"Where can I find information about clock-cycles of the processor operations? like bitwise, or, and etc.."

=> FX3 makes use of the integrated ARM926_EJS and hence the timings will be same as that of the ARM9 core being used.

Can you please let me know why you would need this information?

Regards,

Yashwant

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2 Replies
YashwantK_46
Moderator
Moderator
Moderator
100 solutions authored 50 solutions authored 50 likes received

Hello Omri,

"In addition, just to be sure - the cpu clock is 200Mhz without option the change it. Am I right?"

=> The CPU clock can go beyond 201MHz (or even 192MHz if the  setSysClk400 = CyFalse where input clock would be taken as 384MHz) but for that the input clock source need to be changed to either a 26MHz or 52MHz input clock or crystal, the sys_clk would be set to 416MHz and the CPU clock (which is sys_clk/2) would be 208MHz.

The CPU clock can be configured to be less than 200MHz by changing the divider values which are being sent to the CyU3PDeviceInit() API.

The clock structure that is passed to the CyU3PDeviceInit() has the below structure and explanation:

pastedImage_0.png

"Where can I find information about clock-cycles of the processor operations? like bitwise, or, and etc.."

=> FX3 makes use of the integrated ARM926_EJS and hence the timings will be same as that of the ARM9 core being used.

Can you please let me know why you would need this information?

Regards,

Yashwant

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Hi Yashwant,

We had to do minor post-processing of byte switching but we solve it in another way.

Thanks for your detailed reply!

Omri.

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