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Hello,
Connect to the USB 2.0 Port 500mA, but the dcp callback function launch (bc_fsm_sink_dcp_connected)
It seems abnormal, because the dcp will set the charging current to 1.5A.
Please advise
Thanks
Solved! Go to Solution.
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Hi,
Please note that though SDP, DCP and CDP ports are defined @ file battery_charging.h, the firmware only identifies DCP and CDP states. It is not possible to go to SDP states.
The top-level flow is as follows:
1) After the Type-C port locks as sink, CCG3PA first tries to enter PD contract with the source.
2) If source is a DCP/Apple Charger/QC, PD communication fails and CCG3PA TYPE-C port then starts with Apple charger detection.
3) If Apple charger is not detected, CCG3PA initiates QC charger detection.
4) QC charger detection consists of the following steps:
a) BC1.2 Data Connect Detect
b) BC 1.2 Primary detection
c) BC 1.2 Secondary detection
5) If QC charger is not detected, it is assumed that a TYPE-C only source is connected.
In the firmware, if the DM voltage is less than VDP_SRC, primary detection fails and enters the else condition where it assumes the Type-C source only connected as pointed out by you.
Best Regards,
Mallika
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Hi,
>>Can you please verify if the source has a DCP or a SDP port?
This can be done by checking the voltage levels on the D+/D- lines.
>>Also, how are you verifying the DCP function execution, are you running in debug mode?
Best Regards,
Mallika
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Hi,
1.How to measure the D-/D-? connects PC USB 2.0 Port 500mA to CYPD3171, then check the D+/D- Voltage? or Not to connects the CYPD3171? Please guide us
2. I set the SW uart in the callback. (bc_fsm_sink_dcp_connected)
BRs
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Hi,
Please connect the device to source and check.
Check the BC 1.2 Spec for details on this.
Regards,
Mallika
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Hi,
The D+ is 1.1V.
The D- is 1.1V.
Below the Apple 1A adapter
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Hi,
Sorry, Please ignore above message.
If I connects to USB 2.0 Port 500mA, The D+, D- all 0V
It CYPD3171 should detects its a SDP, right?
Thanks
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Hi,
Can you please check for SDP connected state in bc_fsm_sink_primary_charger_detect() in battery_charging.c file in the firmware?
This can be done by adding bc_stat->cur_mode.
Primary detection is done to determine if the port is SDP, DCP or CDP, for which the device sends out 0.5-0.7 V pulse on D+ and waits for a similar pulse on D-.
Best Regards,
Mallika
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Hello
I'm add a uart log at the begin of bc_fsm_sink_primary_charger_detect()
Here the log, Please let me know how the know the flow is good
----
primary_charger_detect evt:0 mod:0
primary_charger_detect evt:9 mod:0
primary_charger_detect evt:A mod:0
secondary_charger_detect 0
secondary_charger_detect 9
dcp connected 0
----
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Because I am using Power bank,
1. chgb_apply_sink_term() API will let the CYPD3151 set the D+ as 0.5-0.7 V, am I right?
2. after BC_FSM_EVT_TIMEOUT1 timeout, chgb_set_comp() API will check D-, right?
3. if D- is low, it means the the chgb_set_comp()
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3. if D- is low, it means the the chgb_set_comp(), it means the the chgb_set_comp() is SDP right?
Thanks
BRs
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Hi,
Your understanding is correct.
As per the BC 1.2 spec, after VBUS detect and Data contact detect, primary detection occurs.
In Primary Detection, the device applies 0.5-0.7 V pulse on D+ and waits for a similar pulse on D- to distinguish between a SDP and DCP/CDP port.
If connected to a SDP port, D- will remain below 0.4V.
If connected to a DCP or CDP port a voltage greater than 0.4V will be sensed on D-
Now, the UART logs indicate the sequence for detection is working properly in the ccg device. So there should have been some voltage on the D+ and D-, however you found them to be 0.
I think you are measuring the voltage before the Primary detection occurs.
Can you please capture the voltage waveform from the instance the source is connected and attach in this thread?
Also, can you please try testing with any other known source such as a laptop port and update the results?
Best Regards,
Mallika
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Hi,
I would like to clarify one thing first.
If D- is low, it's SDP, right? but why does the code flow run below?
--
/* TYPE-C only source connected. */
bc_stat->bc_fsm_state = BC_FSM_SINK_TYPE_C_ONLY_SOURCE_CONNECTED;
bc_set_bc_evt (c_port, BC_EVT_ENTRY);
--
So the type_c_only_source_connected() callback be launched
I think it shall be
--
bc_stat->bc_fsm_state = BC_FSM_SINK_SDP_CONNECTED
bc_set_bc_evt (c_port, BC_EVT_ENTRY);
--
So the bc_fsm_sink_sdp_connected() callback be launched
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Hi,
Please note that though SDP, DCP and CDP ports are defined @ file battery_charging.h, the firmware only identifies DCP and CDP states. It is not possible to go to SDP states.
The top-level flow is as follows:
1) After the Type-C port locks as sink, CCG3PA first tries to enter PD contract with the source.
2) If source is a DCP/Apple Charger/QC, PD communication fails and CCG3PA TYPE-C port then starts with Apple charger detection.
3) If Apple charger is not detected, CCG3PA initiates QC charger detection.
4) QC charger detection consists of the following steps:
a) BC1.2 Data Connect Detect
b) BC 1.2 Primary detection
c) BC 1.2 Secondary detection
5) If QC charger is not detected, it is assumed that a TYPE-C only source is connected.
In the firmware, if the DM voltage is less than VDP_SRC, primary detection fails and enters the else condition where it assumes the Type-C source only connected as pointed out by you.
Best Regards,
Mallika