CYPD3177 USB data/LDO output current/firmware updates?

[FiLu_4751656]

Hello,

The CYPD3177 would be powered from VBUS_IN, expecting 3.3V at Vddd from the LDO. Only the VBUS FET is used while the SAFE PWR FET connection is used with a pull-up to indicate whether a proper charger is attached or some other USB source that is only capable of 5V. Since FAULT is also used for OVP and UVP I decided it would make sense to leave that to the MCU to sort out and have the SAFE PWR FET as a separate signal (don't need the actual 5V on the bus). I hope that the train of thought is correct there.

Questions:

1. In the datasheet, the USB data lines are marked as NC, in the evaluation schematic they are connected "for future use". Are they actually used for things like BC1.2, or would be in the future?
2. I would like to have a small USB mux (drawing ~50uA) powered from the LDO's Vddd 3.3V line. Does the supply line support any external loading? If so are there any specifications of how much current can be safely sourced?

3. There are many contradictions regarding the features of the device. Does the device support PPS? The datasheet says yes, the forum says no. Does the device still allow dummy legacy type-c adapters to get through the VBUS FET even tho the PDO doesn't match? Can we expect any updates to the firmware of the device in the future and if so is there a timeline?

Thank you and Best Regards,

Filip.

[Pranava_YN · Accepted solution]

Hi Filip,

Welcome to Cypress Developer Community!

1. In the datasheet, the USB data lines are marked as NC, in the evaluation schematic they are connected "for future use". Are they actually used for things like BC1.2, or would be in the future?

>> Yes, USB2 data lines are used for legacy charging protocols such as BC 1.2, AFC and Apple Charging.

     But currently since CYPD3177 (BCR) does not support any legacy charging protocols, USB2 lines are not connected.

2. I would like to have a small USB mux (drawing ~50uA) powered from the LDO's Vddd 3.3V line. Does the supply line support any external loading? If so are there any specifications of how much current can be safely sourced?

>> VDDD pin should not be used to source any current. It must only be terminated with 1uF and 2 x 100nF capacitors as mentioned in the datasheet.

3. There are many contradictions regarding the features of the device. Does the device support PPS? The datasheet says yes, the forum says no.

>> BCR does not support PPS. There is a mistake in the datasheet and will be rectified in the future revisions.

Does the device still allow dummy legacy type-c adapters to get through the VBUS FET even tho the PDO doesn't match? Can we expect any updates to the firmware of the device in the future and if so is there a timeline?

>> Yes the BCR still allows dummy legacy type-c adapters to get through the VBUS FET.

     The BCR is expected to have a firmware update later this year.

Regards,

Pranava

[FiLu_4751656]

Thank you for the answers Pranava,

As a follow-up question, if I would switch off the VBUS FET manually if I detect the 5V from a dummy source going through, is the BCR going to complain for not sensing the output voltage but sensing the input?

Is that going to show up as a fault? Or is the behaviour undefined in that case?

And regarding the update, are we going to be able to just buy the new version of the IC with the same package/pinout/characteristics but with the new firmware and replace the old one?

Regards,

Filip.

[Pranava_YN]

Hi,

Since dummy source can not communicate to BCR through PD communication. BCR just follows Type C specification in that case. Therefore no faults are triggered. But please note that VBUS FET is driven by VBUS_FET_EN pin in BCR. It is not possible to control this pin through HPI interface.

May i know how you are planning to control VBUS FET when dummy source is detected?

Alternative suggestion is to use a separate load switch after the VBUS FET to implement your requirement.

And regarding the update, are we going to be able to just buy the new version of the IC with the same package/pinout/characteristics but with the new firmware and replace the old one?

>> Yes, you are correct.

[FiLu_4751656]

Hi,

Regarding the load switch I am aware that it cannot be controlled through the HPI interface.

I would assume that given the nature of the VBUS load switch, the control pin (VBUS_FET_EN) is essentially just an open drain/collector that pulls the gate down to ground. Even if that is not totally accurate I would wadger you can insert at least a P-FET between the gate of the main load switch and the VBUS_FET_EN pin and control it with a voltage comparator on VBUS. If VBUS < VBUS_MIN the VBUS_FET_EN cannot drive the gate of the load switch thus the output remains disconnected (PFET is disabled). In my own application I can just disable the load if the voltage is under VBUS_MIN and not complicate the gate driving circuitry using the same comparator circuit - mostly the same as your suggestion.

Regarding the loading of the internal LDO from a previous question I think that there is some power budget.

The datasheet specifies that all 4 resistor dividers for VBUS_MIN, VBUS_MAX, etc should reference Vddd. The datasheet also recommends some resistor values ranging from 1k to 5.1k.

If all resistor dividers are configured with a 5.1k pull-up and a 1k pull-down then there are 4x 6.1kohm resistors in parallel to ground which is equivalent to a ~1.5k resistor to ground. If Vddd = 3.3V then the total current through all the resistor dividers is 3.3V/1.5k =~ 2.2mA.

If a different resistor configuration is used then there should be extra power budget from the LDO and when I asked about a load of ~50uA, at least in my opinion, it should have no problem in delivering that since the load is orders of magnitude smaller than the load of the resistive dividers. Does this make sense or am I missing something?

Regarding the updates. Thank you for making that clear.

Thank you for the patience and info and best regards,

Filip.

[Pranava_YN]

Hi,

Sorry for the delay in responding,

It is possible to draw 50uA of current from VDDD pin of BCR. But since VDDD pin is not intended to power external devices we neither recommend nor guarantee its working.

Regards,

Pranava