Issue programming S25FL064L

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MuKh_4408861
Level 3
Level 3
10 replies posted 10 sign-ins 5 replies posted

Hi all,

I've downloaded standard code from Cypress page for NOR-Flash programming.

https://www.cypress.com/documentation/code-examples/ce220823-psoc-6-mcu-smif-memory-write-and-read-o...
Reconfigured successfully to my Processor which is CY8C6347FMI-BLD53T.
Reconfigured with my modified cymem file for S25FL064L NOR-Flash (see attached and also image below).

pastedImage_11.png

Getting all 0xFF on reading.

FAIL: Read data does not match with written data. Read/Write operation failed.

Error Code: 0xFFFFFF01

Error Code:
0xFFFFFF01

Please advise what is wrong.
With my other code I was able to read ID and Erase and Read chip in quad mode, but with same outcome. After programming all reading FFs.
Same code running on EV board was able to correctly program S25FL512S memory.

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1 Solution

Hi,

Thank you so much for the detailed explanation of the problem. Please see my comments and question below -

  • I have gone through the S25FL064L.cymem file provided by you. I noticed that you are using 6Bh command for read. I would like to point out that 6Bh command is Quad Output Read (QOR) which means that only the output of this command is Quad. That is, the instruction, address and dummy cycles provided in this command are single width and only the output received from the flash is quad. See the timing diagram from datasheet below. However, in the configuration file provided by you the width for address, mode and dummy cycles have also been set to Quad. Could you please set it up correctly and try again?

pastedImage_2.png

  • Could you please explain why you have set the dummy cycles for 6Bh command to 32? You can find the required number of dummy cycles depending upon the operating frequency for different read commands mentioned in Table 17 on page 36 of the datasheet. Let me know if you have any confusion in calculating the correct number of dummy cycles for your application.
  • We agree with your speculation that the issue seems to be with the SW, not HW, since you are able to read the correct device ID. However, it is important to see waveforms while debugging. Seeing the terminal output might not be a dependable way because there might be chances of inconsistency (due to human error) between what signal is being sent to or received from the flash with respect to what is being printed on the terminal. We look at waveforms to make sure that the flash is receiving the correct signals, that is - width of the instruction/dummy cycle/address should be correct, number of dummy cycles provided should be correct, number of address bytes should be correct according to the command being used, etc.
  • You have mentioned in your latest reply that 'reading in normal mode' with '0x02' command is OK. I would like to point out that 02h command is actually Page Program command. Single SPI read command is 03h. Can you please confirm whether 02h is a typing mistake? If yes, can you please reconfirm once that Quad mode has been enabled for S25FL064L device? The QUAD_NV (CR1NV[1]) bit should be set to 1 to be able to use Quad commands.

Please Let me know if you have any questions.

Regards,

Apurva

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6 Replies
Apurva_S
Moderator
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100 likes received 500 replies posted 250 solutions authored

Hi,

Thank you for contacting Cypress Community.

Could you please provide a little clarification about your background. You have another project (not the one attached in the previous response) that gives you correct output for read ID, Erase and Read chip in quad mode, but gives wrong output after programming (output is all FFs even after programming).

You have also tried to modify the code example available here​ to make it work with S25FL064L flash (project attached in previous response) but that also gives you all FFs after programming.

Am i correct?

Can you please answer my below questions -

  1. What do you mean by 'Read chip in quad mode'? What is the exact command that you have used?
  2. Can you tell me the exact sequence of commands that you have followed in your own project? If possible, please provide the relevant code snippet.
  3. Is it possible for you to capture and send the SPI signals waveforms? If yes, I would want you to send us screenshots for read ID command, erase command, read chip in quad mode (as mentioned by you) for your project that gives you correct output, and program command and read command (for the same project) that gives all output as FFs.

Please let me know if you have any questions.

Regards,

Apurva

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Hi Apurva,

OK let me start from the beginning.
1. I was using standard PSoC6 WiFi-BT Pioneer evaluation board CY8CKIT-062-WiFI-BT.
     In that board installed processor CY8C6247BZI-D54.
     Also memory chip in the same board is S25FL512SAGBHIA10

     For that board I was able to get memory fully working with my code. My code is based on your example driver code. Can do Erasing,      Reading and Writing on random address (page reading/writing was used). All good.
2. I've got my own PSoC6 design board with CY8C6347FMI-BLD53T chip and S25FL064L NOR-Flash.
    Configured project to this new processor using Device Selector tool in PSoC Creator.
    Using SMIF Configuration Tool  for memory chips reconfigured S25FL512S file to S25FL064L based on Datasheet. This new configuration      image I've posted above in my previous post. These all was reconfiguration works not involved coding.
     After changes I can read chip ID, Erase ship, Read random address (FFs), Writing also shows as successful - no error. However, reading from same address page after writing gives FFs. Not matching with what was written.
3.  Downloaded standard code from Cypress. (see above post). Reconfigured my proc and memory chip. Result is same. After writing getting all FFs.

4. By "Read chip in quad mode" I mean using command 0x6B (QOR) Quad Output Read. You can see this command and all other used commands in picture above.

5. "Can you tell me the exact sequence of commands that you have followed in your own project? If possible, please provide the relevant code snippet."
Yes I can. But the point is - I'm using standard Cypress code/library for NOR-Flash memory. I'm doing reconfiguration to match my HW. But it does not work. My original code using exact same library functions as the code in attached project. If you or anyone can pinpoint what is missing or wrong in there, that will solve the problem.

6. I can get to SPI signals waveforms,  but to my true believe issue is in SW not HW.
If this can help, please see full Terminal output  of my code data including ID response below.

Start Program

SMIF interrupt is initialized

SMIF is initialized

SMIF initialization complete

=========================================================

SMIF operation in quad mode

Received ID:

0x01 0x60 0x17 =======================

============ NOR-Flash sample code ====================

Test 2440(us): 2500 -----------------

Erase sector(4KB)test(us): 45600 -----------------

memConfig:0x268473472X smifContext1:0x134220340X

Status Code: 0x00000002X

Quad is enabled. Enabling operation skipped

Read Addr:0x000000

Received Data:

0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  =======================

Read test(us): 116000 -----------------

Received Data: 0x2

Write Addr:0x000000

Quad Page Program (QPP 0x32)

Written Data:

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F                  0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F                  0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F                  0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F                  0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F                  0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F                  0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F                  0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F                  0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8A 0x8B 0x8C 0x8D 0x8E 0x8F                  0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9A 0x9B 0x9C 0x9D 0x9E 0x9F                  0xA0 0xA1 0xA2 0xA3 0xA4 0xA5 0xA6 0xA7 0xA8 0xA9 0xAA 0xAB 0xAC 0xAD 0xAE 0xAF                  0xB0 0xB1 0xB2 0xB3 0xB4 0xB5 0xB6 0xB7 0xB8 0xB9 0xBA 0xBB 0xBC 0xBD 0xBE 0xBF                  0xC0 0xC1 0xC2 0xC3 0xC4 0xC5 0xC6 0xC7 0xC8 0xC9 0xCA 0xCB 0xCC 0xCD 0xCE 0xCF                  0xD0 0xD1 0xD2 0xD3 0xD4 0xD5 0xD6 0xD7 0xD8 0xD9 0xDA 0xDB 0xDC 0xDD 0xDE 0xDF                  0xE0 0xE1 0xE2 0xE3 0xE4 0xE5 0xE6 0xE7 0xE8 0xE9 0xEA 0xEB 0xEC 0xED 0xEE 0xEF                  0xF0 0xF1 0xF2 0xF3 0xF4 0xF5 0xF6 0xF7 0xF8 0xF9 0xFA 0xFB 0xFC 0xFD 0xFE 0xFF                  =======================

Received Data: 0x0

Write test(us): 122400 -----------------

Read Addr:0x000000

Received Data:

0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF                  =======================

Read test(us): 115900 -----------------

Read data does not match with written data in quad mode

SMIF operation is failed in quad mode

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Issue is related with reading memory in Quad mode.
When reading in normal mode with 0x02 0x03 command it is OK.

Can read written data correctly.

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Hi,

Thank you so much for the detailed explanation of the problem. Please see my comments and question below -

  • I have gone through the S25FL064L.cymem file provided by you. I noticed that you are using 6Bh command for read. I would like to point out that 6Bh command is Quad Output Read (QOR) which means that only the output of this command is Quad. That is, the instruction, address and dummy cycles provided in this command are single width and only the output received from the flash is quad. See the timing diagram from datasheet below. However, in the configuration file provided by you the width for address, mode and dummy cycles have also been set to Quad. Could you please set it up correctly and try again?

pastedImage_2.png

  • Could you please explain why you have set the dummy cycles for 6Bh command to 32? You can find the required number of dummy cycles depending upon the operating frequency for different read commands mentioned in Table 17 on page 36 of the datasheet. Let me know if you have any confusion in calculating the correct number of dummy cycles for your application.
  • We agree with your speculation that the issue seems to be with the SW, not HW, since you are able to read the correct device ID. However, it is important to see waveforms while debugging. Seeing the terminal output might not be a dependable way because there might be chances of inconsistency (due to human error) between what signal is being sent to or received from the flash with respect to what is being printed on the terminal. We look at waveforms to make sure that the flash is receiving the correct signals, that is - width of the instruction/dummy cycle/address should be correct, number of dummy cycles provided should be correct, number of address bytes should be correct according to the command being used, etc.
  • You have mentioned in your latest reply that 'reading in normal mode' with '0x02' command is OK. I would like to point out that 02h command is actually Page Program command. Single SPI read command is 03h. Can you please confirm whether 02h is a typing mistake? If yes, can you please reconfirm once that Quad mode has been enabled for S25FL064L device? The QUAD_NV (CR1NV[1]) bit should be set to 1 to be able to use Quad commands.

Please Let me know if you have any questions.

Regards,

Apurva

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Thanks Apurva,

Correct. I had to fix Read command address mode to "Single". Then it is good.
I've got working code now. Example project above shows correct reading.
Attached and shown below fixed .cymem file.
pastedImage_0.png

Regarding Dummy Cycles (DC). If I understand correctly According Datasheet for Latency Code 1 it is 8 DCs for 35 MHz. In project  was used 18 MHz for memory access.
Therefore, there should be 4 DCs. However, when I put 4 I'm still getting some rubbish (mostly 0x11) before actual correct data reading starting. When changed to 8 then it is correct.
Regarding Read command - yes of course. Correct one is 0x03. I've been playing with reading/writing and put wrong code in my previous reply (fixed now).

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Hi,

Glad to know that the project works after fixing the address width.

Regarding dummy cycles, I would like to inform you that Latency Code number means the number of dummy cycles required. Please see the table below.

pastedImage_1.png

The latency code mentioned for QOR command for 35MHz operating frequency is 1, which means only 1 dummy cycle is required. As the frequency increases, the latency code (dummy cycles count) also increases. The minimum number of dummy cycles required by the flash is at least 1 at any frequency less than or equal to 35MHz.

Another important point is, the Read Latency bits in the Configuration Register 3 (CR3NV[3:0]). You can see on page 35 of the datasheet that the default value set for these bits is 1-0-0-0, means 8.

pastedImage_2.png

Therefore, even if you are working at any lower frequency for which the latency code mentioned is less than 8, you still need to provide 8 dummy cycles to the flash since that is what the flash is expecting. Since you have not mentioned anything about changing this default value, I am assuming 8 latency cycles is still set in the CR3 register, and that explains why you don't get meaningful output at 4 dummy cycles. You can read the CR3 register to verify.

In your application, the operating frequency is 18Mhz and as already discussed above, the minimum number of dummy cycles required (while the flash is operating at any frequency less than or equal to 35MHz) is 1. Therefore, you should program the CR3NV[3:0] bit to 0-0-0-1.

I would also like to point out that the default latency code of '0' is 8 dummy cycles. Means, if you program CR3NV[3:0] bits to 0-0-0-0, you will have to provide 8 dummy cycles.

Hope that answers your queries. Let me know if you have any confusion.

Thank you and Regards,

Apurva

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