CYW20706 device does not respond sometimes when power up initially

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NiA_4003596
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25 replies posted 10 replies posted 5 replies posted

Hi,

Could anyone please suggest how to resolve the BLE device CYW20706 does not respond sometimes (50% cases) when power up initially. I thought the problem might be the power quality of AC-DC converter, so the device goes to unknown state or brownout. I have changed three different power supplies (which works well with MCU based controller), but the problem with CYW20706 stays. Even i have tried the recommended design by placing 10uF at reset pin.

One thing I've have observed is that i can see few lines of core messages at the puart terminal and then it stopped responding.

Please advice to enhance the system performance.

pastedImage_0.png

Best regards,

Niresh

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1 Solution

Hi,

Could you please try programming a simple GPIO application from hal category? (Example snip/hal/gpio). Let's verify the hardware connection first and then debug the software. If you have an EVAL (20706 or module) board please verify the same app in that as well.

Did you try it without the external pull up?

There are some Considerations and Optional Components for Brown Out (BO) Conditions are mentioned in the datasheet under Power Connections (VDDIN).

A Brown Out condition may be met if power supply provided to the module during power up or reset is in the following range:

Capture.PNG

Could you please read the VDD voltages and ensure that this condition is not occurring.

If this event protection is not guaranteed then usage of an external voltage detection device is also recommended.

Thanks,

-Dheeraj

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10 Replies
DheerajPK_41
Moderator
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750 replies posted 500 likes received 500 replies posted

HI,

Could you please share the PUART traces with us (upto what you could see)? Was it a meaningful print?

"CYW20706 does not respond sometimes" -> What operation were you trying to do? When did it stop responding?

Could you please explain the testing steps that you have executed?

Thanks,

-Dheeraj

Hi,

Two things I have observed,

  1. No external pull-up resistor required for reset pin as per datasheet, but without that it is not taking program.
  2. In order to maintain 50 ms reset delay after VDD stabilize , I have used RC time constant 100 ms using 10K pull up and 10uF across reset pin. It seems 100 ms delay is not enough sometimes.

I have configured a timer to toggle LED every 1 sec and could see the following PUART traces. Sometimes the LED does not toggle and even i don't receive the pool message "pool size/cur/max/total" if i used 100ms reset delay. I thought it might be brownout condition and resolved the problem with more RC time constant 470 ms using 47K pull up and 10uF.  Please suggest preferred value across reset pin for the optimized design.

setup nvram ids: net_key_max_num:4 app_key_max_num:8 nvm_idx_seq:44 48-75 cfg_data_len:400

node_data:57 net_key_begin:51 app_key_begin:49

Mesh Start: 2.5.0.7341

## mesh_application_init free_bytes:42088 ##

UUID:

c9 49 4e e4 5a e9 4e 8b 93 d4 7a 75 02 db f5 94

observe start active:0

mesh_application_init: provisioned GATT DB status:0

ds1:0x00003000, len:0x0003e800

ds2:0x00041800, len:0x0003e800

platform btp: Config_DS_Location 0x00004000, Config_VS_Location:0x00002000

WARNING: Upgrade will fail - active DS is not one of the expected locations

WARNING: Are ConfigDSLocation and DLConfigVSLocation in the .btp set up as in nv_loc_len[]?

WARNING: Upgrade will fail - active DS is not one of the expected locations

WARNING: Please build with OTA_FW_UPGRADE=1 and download

mesh_application_init: wiced_ota_fw_upgrade_init failed

***** Free mem after app_init:40596

Best regards,

Niresh

0 Likes

Hi,

Could you please try programming a simple GPIO application from hal category? (Example snip/hal/gpio). Let's verify the hardware connection first and then debug the software. If you have an EVAL (20706 or module) board please verify the same app in that as well.

Did you try it without the external pull up?

There are some Considerations and Optional Components for Brown Out (BO) Conditions are mentioned in the datasheet under Power Connections (VDDIN).

A Brown Out condition may be met if power supply provided to the module during power up or reset is in the following range:

Capture.PNG

Could you please read the VDD voltages and ensure that this condition is not occurring.

If this event protection is not guaranteed then usage of an external voltage detection device is also recommended.

Thanks,

-Dheeraj

Hi,

Are you still facing this issue? Did you try with simple HAL application?

The 10uF capacitor is not mandatory in the XRES connection for 20706 based modules. But it should not cause any problem as well. But, you can definitely try removing it and see if anything changes.

You can check the reference design of other 20706 module EVAL kit for the verification of connections.

https://www.cypress.com/documentation/development-kitsboards/cybt-333047-eval-ez-bt-module-arduino-e...

https://www.cypress.com/documentation/development-kitsboards/cybt-343026-eval-ez-bt-module-arduino-e...

Please consider the points I have mentioned in the previous response as well.

Thanks,

-Dheeraj

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Hi,

Thank you!

Evaluation board everything works fine. I noticed there is 10K pull resistor in eval board.

1. I am using CYBT-333032-02 module for both dimmable server node and dimmer switch client for LED lighting application. It is strange that a few module without external resistor was not taking program of simple HAL application and after placing the resistor it is taking program. Please tell me whether this type of issues you have come across before.

2. I have tried different values of capacitor, we need minimum of 4.7uF for 10K external pull resistor at the XRES connection for 20706 based modules, otherwise many times I have observed controller goes to brown out condition.

3. One more thing i have observed even with 100K pull up and 10uF at XRES, the controller is powered up, voltage is very stabilized and application is running successfully, in between i just touch the XRES pin to GND to reset the controller and sometime I can see the below trace and stopped responding. Need atleast three external reset to see it is working. This condition occurs only on external reset not during power cycling.

setup nvram ids: net_key_max_num:4 app_key_max_num:8 nvm_idx_seq:44 48-75 cfg_data_len:400

node_data:57 net_key_begin:51 app_key_begin:49

Mesh Start: 2.5.0.7341

## mesh_application_init free_bytes:42088 ##

UUID:

c9 49 4e e4 5a e9 4e 8b 93 d4 7a 75 02 db f5 94

observe start active:0

mesh_application_init: provisioned GATT DB status:0

ds1:0x00003000, len:0x0003e800

ds2:0x00041800, len:0x0003e800

platform btp: Config_DS_Location 0x00004000, Config_VS_Location:0x00002000

WARNING: Upgrade will fail - active DS is not one of the expected locations

WARNING: Are ConfigDSLocation and DLConfigVSLocation in the .btp set up as in nv_loc_len[]?

WARNING: Upgrade will fail - active DS is not one of the expected locations

WARNING: Please build with OTA_FW_UPGRADE=1 and download

mesh_application_init: wiced_ota_fw_upgrade_init failed

***** Free mem after app_init:40596

4. What is the reset release voltage at which i have to see VDDIN >= VIH and also 50ms reset delay is achieved.

pastedImage_1.png

Best regards,

Niresh

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Hi,

I believe you are mentioning about 10K pull up on XRES.

1) Could you please tell me the download procedure which you are following?  Are those modules (where download fails) flashed with any application earlier?

It is recommend to put the device into Download mode before starting the actual application download. In the EVAL board you might be resetting the device while holing the recovery button before downloading an application. Similarly, you may need to reset the device while keeping the CTS low, and then release CTS, to put the device into Download mode. Are you following this procedure?

Please check WICED-HCI-Control-Protocol.pdf (check "2.2 Preparing for HCI Commands") for more details.

2) 4). As you can see, our reference design of EVAL board does not have this capacitor, though the datasheet recommends it. For 20706 based modules, the 50 ms delay is not a mandatory condition. I would suggest you to re-verify your custom board schematics by comparing it with the EVAL Kit.

If you think the HW is bad, you can contact the Cypress Sales, and, also you can create a SFDC case specifically for the custom HW debugging.

3) I think, the device goes to some bad state or goes to Download mode due to multiple reset. What is the state of the CTS pin during these operations? Could you please monitor the signals - CTS, RTS, XRES, TX, RX during the experiment?

Thanks,

-Dheeraj

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Hi,

1) The modules (where download fails) has not flashed with any application earlier. Yes, I am following the procedure of resetting the device while keeping the CTS low, and then release CTS, to put the device into Download mode

After placing a pull up resistor, it took programming.

2) As per my observation, 50 ms delay is a mandatory condition, otherwise the device goes to bad state sometimes. I agree EVAL board does not have this capacitor, and tested working fine with DC supply.

3) Is there a way my controller is being evaluated by CYPRESS design team and resolve all my queries.

Best regards,

Niresh

0 Likes

Hi,

"Is there a way my controller is being evaluated by CYPRESS design team and resolve all my queries"

Since you are facing intermittent download issues in your boards containing Cypress modules, we can definitely help you in debugging it further. You can create a SFDC case (https://www.cypress.com/mycases) for this purpose.

I believe, currently you are facing below two issues. Please correct me if I am wrong.

See my inline responses as well.

1. I am using CYBT-333032-02 module for both dimmable server node and dimmer switch client for LED lighting application. It is strange that a few module without external resistor was not taking program of simple HAL application and after placing the resistor it is taking program. Please tell me whether this type of issues you have come across before.

->As per the reference design the pull up is needed for XRES. The XRES signal is an active-low signal, which is an input to the CYBT-3330xx-02 module (solder pad 3)

2. One more thing i have observed even with 100K pull up and 10uF at XRES, the controller is powered up, voltage is very stabilized and application is running successfully, in between i just touch the XRES pin to GND to reset the controller and sometime I can see the below trace and stopped responding. Need atleast three external reset to see it is working. This condition occurs only on external reset not during power cycling.

-> I believe, the device goes to some bad state or goes to Download mode (when CTS is asserted) due to the reset. Need to analyse the UART lines and reset line for further debugging. Could you please use a push button to do the reset to avoid any irregular/unwanted electrical spikes.

Also, please monitor the signals - CTS, RTS, XRES, TX, RX during the experiment and check whether any inappropriate transitions happening or not.

Thanks,

-Dheeraj

Hi,

Thank you for the suggestion to create SFDC case. As per reference schematic and your input, i keep 10K external pull resistor at XRES. Also please advise higher resistance say 100K is recommended or not.

The real problem comes in selecting the capacitor at XRES. As per datasheet release XRES after VDD stability + 50ms. But with RC circuit at XRES, this is not possible because reset voltage starts ramping up along with VDD. So to understand better i need to know what is the reset release voltage at which i have to see VDDIN >= VIH and also 50ms reset delay is achieved.

I can even place higher capacitor like 10uF as per recommendation in the datasheet, but another problem arise. Just imagine the module is powered up and the application is running. Suddenly power goes OFF, then the voltage across reset will not drop to 0V immediately, due to RC circuit the voltage at XRES will gradually reduce. Now what will happen if reset voltage is reaching down to 2.0V and power comes back. The reset voltage starts ramping up from 2.0V and at that point of time VDDIN will be lesser than VIH, so module goes to bad state or brownout condition. I have observed this scenario happens if there is power fluctuation for a couple of seconds.

pastedImage_1.pngpastedImage_1.png

For the second point, i will check and get back to you.

Best regards,

Niresh

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Hi,

I think we can start debugging by monitoring the different signals (uart pins, reset,..) during bootup and reset, to check whether these causes any unexpected issue or not.

As long as your schematics matches to the reference design the modules should work properly as you can see in the EVB kit.

Adding an appropriate capacitor for 50ms delay will also not cause any issues.

Thanks,

-Dheeraj