Is this a bug in the auto code generator for BLE OTA DFU?

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EdHa_4455331
Level 5
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I am trying to create a bare-bones "app1" project that is compatible with BLE over-the-air (OTA) device firmware updates (DFUs)
AND uses a dual core configuration for the BLE module. So I have gone through the following steps to try to create such an app1.

1. Start with example project CE216767 (this provides a functional DFU app0).
2. Delete the "app1" from that workspace (it doesn't use a dual core BLE module).
3. Add a new blank project called "My App1" that targets a CYBLE-41045-02 device with an empty schematic.
4. Pull a Bluetooth Low Energy [v2.10] module onto the schematic.
5. Change the name of the module from BLE_1 to BLE.
6. Change the CPU core of the module to Dual Core.
7. On the Design Wide Resource/Interrupts, move the BLE_1_bless_isr from ARM CM4 to ARM CM
8. On the Build Settings, check DFU/DUF_SDK/Core.
9. Generate Application.
10. Following the instructions in the pdf included with CE216767, in dfu_cmp0.ld, change

REGION_ALIAS("flash",       flash_app0_core0);
REGION_ALIAS("flash_core1", flash_app0_core1);
REGION_ALIAS("ram",           ram_app0_core0);

/* DFU SDK specific: sets an app Id */
__cy_app_id = 0;

to

EGION_ALIAS("flash",       flash_app1_core0);
REGION_ALIAS("flash_core1", flash_app1_core1);
REGION_ALIAS("ram",           ram_app1_core0);

/* DFU SDK specific: sets an app Id */
__cy_app_id = 1;

11. Following the instructions in the pdf included with CE216767, dfu_cmp4.ld, change

REGION_ALIAS("flash_core0", flash_app0_core0);
REGION_ALIAS("flash",       flash_app0_core1);
REGION_ALIAS("ram",           ram_app0_core1);

/* DFU SDK specific: sets an app Id */
__cy_app_id = 0;

to

REGION_ALIAS("flash_core0", flash_app1_core0);
REGION_ALIAS("flash",       flash_app1_core1);
REGION_ALIAS("ram",           ram_app1_core1);

/* DFU SDK specific: sets an app Id */
__cy_app_id = 1;

12. Following the instructions in the pdf included with CE216767, in dfu_cmp0.ld, change

; Flash
#define FLASH_START             CY_APP0_CORE0_FLASH_ADDR
#define FLASH_SIZE              CY_APP0_CORE0_FLASH_LENGTH

; Emulated EEPROM Flash area
#define EM_EEPROM_START         CY_APP0_CORE0_EM_EEPROM_ADDR
#define EM_EEPROM_SIZE          CY_APP0_CORE0_EM_EEPROM_LENGTH

; External memory
#define XIP_START               CY_APP0_CORE0_SMIF_ADDR
#define XIP_SIZE                CY_APP0_CORE0_SMIF_LENGTH

; RAM
#define RAM_START               CY_APP0_CORE0_RAM_ADDR
#define RAM_SIZE                CY_APP0_CORE0_RAM_LENGTH

to

; Flash
#define FLASH_START             CY_APP1_CORE0_FLASH_ADDR
#define FLASH_SIZE              CY_APP1_CORE0_FLASH_LENGTH

; Emulated EEPROM Flash area
#define EM_EEPROM_START         CY_APP1_CORE0_EM_EEPROM_ADDR
#define EM_EEPROM_SIZE          CY_APP1_CORE0_EM_EEPROM_LENGTH

; External memory
#define XIP_START               CY_APP1_CORE0_SMIF_ADDR
#define XIP_SIZE                CY_APP1_CORE0_SMIF_LENGTH

; RAM
#define RAM_START               CY_APP1_CORE0_RAM_ADDR
#define RAM_SIZE                CY_APP1_CORE0_RAM_LENGTH

12. Following the instructions in the pdf included with CE216767, in dfu_cmp4.ld, change

; Flash
#define FLASH_START             CY_APP0_CORE1_FLASH_ADDR
#define FLASH_SIZE              CY_APP0_CORE1_FLASH_LENGTH

; Emulated EEPROM Flash area
#define EM_EEPROM_START         CY_APP0_CORE1_EM_EEPROM_ADDR
#define EM_EEPROM_SIZE          CY_APP0_CORE1_EM_EEPROM_LENGTH

External memory
#define XIP_START               CY_APP0_CORE1_SMIF_ADDR
#define XIP_SIZE                CY_APP0_CORE1_SMIF_LENGTH

; RAM
#define RAM_START               CY_APP0_CORE1_RAM_ADDR
#define RAM_SIZE                CY_APP0_CORE1_RAM_LENGTH


to

; Flash
#define FLASH_START             CY_APP1_CORE1_FLASH_ADDR
#define FLASH_SIZE              CY_APP1_CORE1_FLASH_LENGTH

; Emulated EEPROM Flash area
#define EM_EEPROM_START         CY_APP1_CORE1_EM_EEPROM_ADDR
#define EM_EEPROM_SIZE          CY_APP1_CORE1_EM_EEPROM_LENGTH

; External memory
#define XIP_START               CY_APP1_CORE1_SMIF_ADDR
#define XIP_SIZE                CY_APP1_CORE1_SMIF_LENGTH

; RAM
#define RAM_START               CY_APP1_CORE1_RAM_ADDR
#define RAM_SIZE                CY_APP1_CORE1_RAM_LENGTH

12. Following the instructions in the pdf included with CE216767, in dfu_mdk_symbols.c change

__cy_app_core1_start_addr   EQU __cpp(CY_APP0_CORE1_FLASH_ADDR)

/* Application number (ID) */
__cy_app_id                 EQU 0

/* CyMCUElfTool uses these to generate an application signature */
/* The size of the default signature (CRC-32C) is 4 bytes */
__cy_app_verify_start     EQU __cpp(CY_APP0_CORE0_FLASH_ADDR)
__cy_app_verify_length    EQU __cpp(CY_APP0_CORE0_FLASH_LENGTH + CY_APP0_CORE1_FLASH_LENGTH - CY_BOOT_SIGNATURE_SIZE)

to

__cy_app_core1_start_addr   EQU __cpp(CY_APP1_CORE1_FLASH_ADDR)

/* Application number (ID) */
__cy_app_id                 EQU 1

/* CyMCUElfTool uses these to generate an application signature */
/* The size of the default signature (CRC-32C) is 4 bytes */
__cy_app_verify_start     EQU __cpp(CY_APP1_CORE0_FLASH_ADDR)
__cy_app_verify_length    EQU __cpp(CY_APP1_CORE0_FLASH_LENGTH + CY_APP1_CORE1_FLASH_LENGTH - CY_BOOT_SIGNATURE_SIZE)


13. Build My App1

Now I get the following error

prj.M0120:Build Error: region RAM overflowed with stack.

My best guess is that the autogenerated code did not allocate enough RAM somewhere to support the dual core BLE configuration.
But I am hesitant to just go mucking around with various #defines that have the work RAM in them.

But, OTOH, maybe I just missed a configuration step somewhere.
Can anybody suggest where to fix this (or provide an alternative explanation for the error)?

Thanks,

Ed H.

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1 Solution
ShipingW_81
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500 replies posted 250 solutions authored 250 replies posted

EdHa_4455331

For the specific error "region RAM overflowed with stack.", you need to enlarge the space size allocated for app1 dual cores. You can find the below items in dfu_cm0p.ld and dfu_cm4.ld file(with default value in CE216767). Allocate proper size for each core with modifying "LENGTH" and "ORIGIN" -

    ram_app1_core0    (rwx) : ORIGIN = 0x08000100, LENGTH = 0x7F00

    ram_app1_core1    (rwx) : ORIGIN = 0x08008000, LENGTH = 0x8000

However, it looks I don't find the target items mentioned in your step#12 in original CE216767. Let me know if you have downloaded the latest code example from link? - https://www.cypress.com/documentation/code-examples/ce216767-psoc-6-mcu-bluetooth-low-energy-ble-dev...

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ShipingW_81
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

EdHa_4455331

For the specific error "region RAM overflowed with stack.", you need to enlarge the space size allocated for app1 dual cores. You can find the below items in dfu_cm0p.ld and dfu_cm4.ld file(with default value in CE216767). Allocate proper size for each core with modifying "LENGTH" and "ORIGIN" -

    ram_app1_core0    (rwx) : ORIGIN = 0x08000100, LENGTH = 0x7F00

    ram_app1_core1    (rwx) : ORIGIN = 0x08008000, LENGTH = 0x8000

However, it looks I don't find the target items mentioned in your step#12 in original CE216767. Let me know if you have downloaded the latest code example from link? - https://www.cypress.com/documentation/code-examples/ce216767-psoc-6-mcu-bluetooth-low-energy-ble-dev...

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> However, it looks I don't find the target items mentioned in your step#12 in original CE216767.

Not a problem. CE216767 targets the CY8CKIT. I'm working or creating a version that will run on the CYBLE-41045-02 module.

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