How to clock a UDB component at 100MHz

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IbTi_4677236
Level 1
Level 1
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Hi,

I'm working on a PSoC6 BLE Pioneer Kit (CY8CKIT-062-BLE)

I have created a custom UDB component (Add Component Item->UDB Document) and implemented a design utilizing a datapath. I have verified that my design is working properly with a clock rate of 50MHz.

But when I try to set the clock frequency to 100MHz, I get the error below:

Pin guidance unavailable: Clock "Clock_6" cannot be used with UDB components, analog components, or pins because its frequency exceeds half of the PeriClk frequency of 100 MHz.

I have set the PeriClk frequency to 100MHz, which is its maximum.

So my understanding is that the maximum clock rate allowed to use with a UDB is 50MHz. But the datasheet says a UDB can be clocked at 100MHz.

How can I clock a UDB component with a clock rate of 100MHz?

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1 Solution
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

IbTi,

Try the following steps:

  1. Open the DWR (Design Wide Resources)
  2. Select the Clock Tab.
  3. Find the Clk_Peri and check the Nominal Frequency.  It's probably set to 50MHz.  You want 100MHz.
  4. Check if the Clk_Peri Divider value = 2.  If true, you want to change it to 1.
  5. if 4. is true, select Edit Clock.
    pastedImage_3.png
  6. Change the Divider: field in the Clk_Peri to 1.
  7. Select OK.
    pastedImage_9.png
  8. You should now see that back on the DWR/Clock/Clk_Peri/Divider should now indicate 1 and the Nominal Frequency = 100MHz.
    pastedImage_10.png

Note:  All other components/peripherals being driven from the Clk_Peri clock may need to be adjusted.   Some components will auto-adjust to the new driving clock (such as the UART), others may have to be manually adjusted.

Give it a try.

Len

Len
"Engineering is an Art. The Art of Compromise."

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4 Replies
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

IbTi,

Try the following steps:

  1. Open the DWR (Design Wide Resources)
  2. Select the Clock Tab.
  3. Find the Clk_Peri and check the Nominal Frequency.  It's probably set to 50MHz.  You want 100MHz.
  4. Check if the Clk_Peri Divider value = 2.  If true, you want to change it to 1.
  5. if 4. is true, select Edit Clock.
    pastedImage_3.png
  6. Change the Divider: field in the Clk_Peri to 1.
  7. Select OK.
    pastedImage_9.png
  8. You should now see that back on the DWR/Clock/Clk_Peri/Divider should now indicate 1 and the Nominal Frequency = 100MHz.
    pastedImage_10.png

Note:  All other components/peripherals being driven from the Clk_Peri clock may need to be adjusted.   Some components will auto-adjust to the new driving clock (such as the UART), others may have to be manually adjusted.

Give it a try.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Hi Len,

Thank you for your help. I've already done these steps. My Clk_Peri is 100MHz

pastedImage_0.png

But when I connect a 100MHz clock (Clk_Peri / 1)  to a UDB component (lets say a DFF for this example) as shown below

pastedImage_1.png

I get the following error:

pastedImage_2.png

Referring to the datasheet (page 61), I think I should be able to use 100MHz clock. Similar conversation took place here.

pastedImage_3.png

I need to use 100MHz clock in my digital design but I can't. I have tried both a verilog implementation or an only datapath implementation.

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IbTi,

Maybe I'm missing something.  Here's my circuit which is almost identical to yours except for Clock_5.  I get no static timing errors or warnings.

pastedImage_0.png

Would the following circuit be the equivalent?

pastedImage_1.png

Len

Len
"Engineering is an Art. The Art of Compromise."

Hi Len,

Indeed the circuits are equivalent. I was just trying to reproduce the error as simple as possible. I needed the registers to get the design to be actually synthesized. Maybe you can get rid of the status register and connect a GPIO instead.

So with your help, I noticed what was wrong with my setup.

Apparently you can't use Clk_Peri / 1 like this:

pastedImage_1.png

But you can use Clk_Peri directly instead:

pastedImage_2.png

Thank you for your help!