DFU linker script issues in Modustoolbox 1.1

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OkBa_4438736
Level 3
Level 3
10 replies posted 5 replies posted 5 questions asked

We have a project based on "CE225909 - PSoC 6 MCU With BLE Connectivity: Battery Level (RTOS)" in which we are able to compile and program our PSoC 6 device successfully with the linked script (cy8c6xx7_cm4_dual.ld)  inside the project. This project also use the build-in postbuild script (cymcuelftool_postbuild.bash) to merge CM4 and CM0p ELF files.

We wanted to add DFU functionality to our project. So we used "CE213903 PSoC6DfuBasic " project as a template.

We use  two APPs. App0 is just used as a launcher and App1 is provides the main logic. Both of the applications run on CM4.

Hence, we modified DFU linker scripts accordingly as :

MEMORY

{

    flash_app0_core0  (rx)  : ORIGIN = 0x10000000, LENGTH = 0x10000

    flash_app0_core1  (rx)  : ORIGIN = 0x10010000, LENGTH = 0x10000

    flash_app1_core0  (rx)  : ORIGIN = 0x10040000, LENGTH = 0x10000

    flash_app1_core1  (rx)  : ORIGIN = 0x10050000, LENGTH = 0x10000

    flash_storage     (rw)  : ORIGIN = 0x100C0000, LENGTH = 0x1000

    flash_boot_meta   (rw)  : ORIGIN = 0x100FFA00, LENGTH = 0x400

    sflash_user_data  (rx)  : ORIGIN = 0x16000800, LENGTH = 0x800

    sflash_nar        (rx)  : ORIGIN = 0x16001A00, LENGTH = 0x200

    sflash_public_key (rx)  : ORIGIN = 0x16005A00, LENGTH = 0xC00

    sflash_toc_2      (rx)  : ORIGIN = 0x16007C00, LENGTH = 0x400

    efuse             (r)   : ORIGIN = 0x90700000, LENGTH = 0x100000

    ram_common        (rwx) : ORIGIN = 0x08000000, LENGTH = 0x0100

    /* note: all the ram_appX_core0 regions has to be 0x100 aligned */

    /* and the ram_appX_core1 regions has to be 0x400 aligned       */

    /* as they contain Interrupt Vector Table Remapped at the start */

    ram_app0_core0    (rwx) : ORIGIN = 0x08000100, LENGTH = 0x1F00

    ram_app0_core1    (rwx) : ORIGIN = 0x08002000, LENGTH = 0x8000

    ram_app1_core0    (rwx) : ORIGIN = 0x08000100, LENGTH = 0x1F00

    ram_app1_core1    (rwx) : ORIGIN = 0x08002000, LENGTH = 0x35800

    em_eeprom         (rx)  : ORIGIN = 0x14000000, LENGTH = 0x8000

    xip               (rx)  : ORIGIN = 0x18000000, LENGTH = 0x08000000

}

/*

* DFU SDK specific: aliases regions, so the rest of code does not use

* application specific memory region names

*/

REGION_ALIAS("flash_core0", flash_app1_core0);

REGION_ALIAS("flash",       flash_app1_core1);

REGION_ALIAS("ram",           ram_app1_core1);

/* DFU SDK specific: sets an app Id */

__cy_app_id = 1;

/* DFU SDK specific */

/* CyMCUElfTool uses these ELF symbols to generate an application signature */

__cy_app_verify_start  = ORIGIN(flash_core0);

__cy_app_verify_length = LENGTH(flash_core0) + LENGTH(flash) - __cy_boot_signature_size;

we also added a postbuild script to merge both ELF files from App1 and App0.

#!/bin/bash

#######################################################################################################################

# This script is designed to post process a PSoC 6 application. It performs sign and merge.

#

# usage:

# cymcuelftool_postbuild.bash <MCUELFTOOL_LOC> <APP1_LOC> <APP0_LOC>

#

#######################################################################################################################

MCUELFTOOL_LOC=$1 

APP0_LOC=$3

APP1_LOC=$2

echo Script: cymcuelftool_postbuild

echo 1: MCUELFTOOL_LOC : $MCUELFTOOL_LOC

echo 2: APP0_LOC       : $APP0_LOC

echo 3: APP1_LOC       : $APP1_LOC

filenameNoExt_app0="${APP0_LOC%.*}"

filenameNoExt_app1="${APP1_LOC%.*}"

#echo $filenameNoExt_app0      

#echo $filenameNoExt_app1         

# Sign and Merge the ELF files

# $MCUELFTOOL_LOC --sign $APP0_LOC --output $filenameNoExt_app0"_signed.elf"

echo --Signed ELF for App1 

$MCUELFTOOL_LOC --sign $APP1_LOC --output $filenameNoExt_app1"_signed.elf"

echo --Pre-Final ELF for App1

$MCUELFTOOL_LOC --merge \

$filenameNoExt_app1"_signed.elf" \

C:/Users/OKBA/mtw/PSoC6DfuApp1_mainapp/psoc6_01_cm0p_sleep_signed.elf \

--output $filenameNoExt_app1"_pre_final.elf"

echo --Final ELF for App1

$MCUELFTOOL_LOC --merge \

$filenameNoExt_app0".elf" \

$filenameNoExt_app1"_pre_final.elf" \

--output $filenameNoExt_app1"_final.elf" \

--hex $filenameNoExt_app1"_final.hex"

# DFU

# $MCUELFTOOL_LOC --sign $filenameNoExt_app1".elf" --output $filenameNoExt_app1"_dfu.elf"

# $MCUELFTOOL_LOC -P $filenameNoExt_app1"_dfu.elf" --output $filenameNoExt_app1"_dfu.cyacd2"

However when we program the final ELF file some of the address space (" flash_app1_core0  (rx)  : ORIGIN = 0x10040000, LENGTH = 0x10000") defined in the DFU linker scripts are missing, thus App1 never runs.

Info : [CyBridge] Start API initialization

Info : [CyBridge] Connected - MiniProg4 CMSIS-DAP HID-0A0C138B02237400

Info : [CyBridge] Hardware initialization complete (1940 ms)

Info : Selected Device: MP4 HID-0A0C138B02237400

Info : ** Target-config: cpu_CY8CKIT_062_BLE.cfg

Info : ** Probe-config: probe_miniprog4.tcl

Info : Open On-Chip Debugger 0.10.0+dev-2.2.0.249 (2019-09-10-10:57)

Info : Licensed under GNU GPL v2

Info : For bug reports, read

Info : http://openocd.org/doc/doxygen/bugs.html

Info : debug_level: 2

Info : C:/Program Files (x86)/Cypress/Cypress Programmer

Info : ./openocd

Info : C:/Program Files (x86)/Cypress/Cypress Programmer/BT

Info : cpu_CY8CKIT_062_BLE.cfg

Info : 0A0C138B02237400

Info : \?hid#vid_04b4&pid_f152&mi_00#a&1ddc84ab&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Info : 0

Info : swd

Info : soft

Info : off

Info : 0

Info : adapter speed: 1500 kHz

Warn : Transport "swd" was already selected

Info : serial: 0A0C138B02237400

Info : transport: swd

Info : rst type: soft

Info : efuse: off

Info : sflash restrict: 0

Info : adapter speed: 1000 kHz

Info : ** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable

Info : cortex_m reset_config sysresetreq

Info : cortex_m reset_config vectreset

Info : none separate

Info : SFlash programming disallowed, see 'sflash_restrictions' command

Info : init_target

Info : tcl server disabled

Info : Listening on port 4445 for telnet connections

Info : CMSIS-DAP: SWD Supported

Info : CMSIS-DAP: FW Version = 1.2.0

Info : CMSIS-DAP: Interface Initialised (SWD)

Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1

Info : CMSIS-DAP: Interface ready

Info : VTarget = 2.895 V

Info : kitprog3: acquiring PSoC device...

Info : clock speed 1000 kHz

Info : SWD DPIDR 0x6ba02477

Info : psoc6.cpu.cm0: hardware has 4 breakpoints, 2 watchpoints

Info : psoc6.cpu.cm0: external reset detected

Info : ***************************************

Info : ** Silicon: 0xE2F0, Family: 0x100, Rev.: 0x23 (B2)

Info : ** Detected Device: CYBLE-416045-02

Info : ** Detected Main Flash size, kb: 1024

Info : ** Flash Boot version 1.20.1.42

Info : ** Chip Protection: NORMAL

Info : ***************************************

Info : psoc6.cpu.cm4: hardware has 6 breakpoints, 4 watchpoints

Info : psoc6.cpu.cm4: external reset detected

Info : Listening on port 3333 for gdb connections

Info : Open On-Chip Debugger

Info : init_target

Info : kitprog3: acquiring PSoC device...

Info : target halted due to debug-request, current mode: Thread

Info : xPSR: 0x01000000 pc: 0x00001f34 msp: 0x080477a8

Info : ** Device acquired successfully

Info : ** psoc6.cpu.cm4: Ran after reset and before halt...

Info : target halted due to debug-request, current mode: Thread

Info : xPSR: 0x61000000 pc: 0x1600400c msp: 00000000

Info : flash 'psoc6' found at 0x10000000

Info : flash 'psoc6' found at 0x14000000

Info : flash 'psoc6' found at 0x16000000

Info : flash 'psoc6_efuse' found at 0x90700000

Info : #0 : psoc6_main_cm0 (psoc6) at 0x10000000, size 0x00100000, buswidth 4, chipwidth 4

Info : #1 : psoc6_work_cm0 (psoc6) at 0x14000000, size 0x00008000, buswidth 4, chipwidth 4

Info : #2 : psoc6_super_cm0 (psoc6) at 0x16000000, size 0x00008000, buswidth 4, chipwidth 4

Info : #3 : psoc6_efuse_cm0 (psoc6_efuse) at 0x90700000, size 0x00000400, buswidth 1, chipwidth 1

Info : #4 : psoc6_main_cm4 (virtual) at 0x10000000, size 0x00000000, buswidth 0, chipwidth 0

Info : #5 : psoc6_work_cm4 (virtual) at 0x14000000, size 0x00000000, buswidth 0, chipwidth 0

Info : #6 : psoc6_super_cm4 (virtual) at 0x16000000, size 0x00000000, buswidth 0, chipwidth 0

Info : #7 : psoc6_efuse_cm4 (virtual) at 0x90700000, size 0x00000400, buswidth 1, chipwidth 1

Info : cyp status: OK

Info : cyp_get_mpn

Info : ** Detected device PN: CYBLE-416045-02 SiliconID: E2F0 Revision: 23 FamilyID: 100 DIE: PSoC6ABLE2

Info : true

Info : program_device "C:/Users/OKBA/mtw/PSoC6DfuApp1_mainapp/Debug/PSoC6DfuApp1_mainapp_final.hex" "0"

Info : ** Program image C:/Users/OKBA/mtw/PSoC6DfuApp1_mainapp/Debug/PSoC6DfuApp1_mainapp_final.hex offset:0 **

Info : kitprog3: acquiring PSoC device...

Info : target halted due to debug-request, current mode: Thread

Info : xPSR: 0x01000000 pc: 0x00001f34 msp: 0x080477a8

Info : ** Device acquired successfully

Info : ** psoc6.cpu.cm4: Ran after reset and before halt...

Info : target halted due to debug-request, current mode: Thread

Info : xPSR: 0x61000000 pc: 0x1600400c msp: 00000000

Info : ** Programming Started **

Info : auto erase enabled

Info : Flash write discontinued at 0x10001a00, next section at 0x10010000

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : Flash write discontinued at 0x10012000, next section at 0x10050000

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : Flash write discontinued at 0x1005ac00, next section at 0x100ffa00

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : no flash bank found for address 0x90300000

Info : no flash bank found for address 0x90500000

Info : wrote 59392 bytes from file C:/Users/OKBA/mtw/PSoC6DfuApp1_mainapp/Debug/PSoC6DfuApp1_mainapp_final.hex in 7.066385s (8.208 KiB/s)

Info : ** Programming Finished **

Info : cyp status: OK

Info : cyp_get_mpn

Info : ** Detected device PN: CYBLE-416045-02 SiliconID: E2F0 Revision: 23 FamilyID: 100 DIE: PSoC6ABLE2

Info : true

Info : reset run

Info : ** Programming Started **

Info : auto erase enabled

Info : Flash write discontinued at 0x10001a00, next section at 0x10010000

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : Flash write discontinued at 0x10012000, next section at 0x10050000

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : Flash write discontinued at 0x1005ac00, next section at 0x100ffa00

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : [100%] [################################] [ Erasing ]

Info : [100%] [################################] [ Programming ]

Info : no flash bank found for address 0x90300000

Info : no flash bank found for address 0x90500000

Info : wrote 59392 bytes from file C:/Users/OKBA/mtw/PSoC6DfuApp1_mainapp/Debug/PSoC6DfuApp1_mainapp_final.hex in 7.033852s (8.246 KiB/s)

Info : ** Programming Finished **

Info : cyp status: OK

Info : cyp_get_mpn

Info : ** Detected device PN: CYBLE-416045-02 SiliconID: E2F0 Revision: 23 FamilyID: 100 DIE: PSoC6ABLE2

Info : true

Info : reset run

Info : psoc6.cpu.cm4 -- clearing lockup after double fault

Info : target halted due to debug-request, current mode: Handler HardFault

Info : xPSR: 0x61000003 pc: 0x8008f3ee msp: 0xffffffe0

Info : Polling target psoc6.cpu.cm4 failed, trying to reexamine

Info : psoc6.cpu.cm4: hardware has 6 breakpoints, 4 watchpoints

Sometimes Open on-Chip debugger throws error as

- psoc.cpu.cm4 -- clearing lockup after double fault.

Which seems like it cant find the cm4 core.

Do you have any idea about the cause of the problem ?

Regards,

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1 Solution

For the code example CE213903 based on ModusToolbox 1.0 to work in ModusToolbox 1.1 you need to make a lot of changes in the linker scripts for things to work mainly because 1.1 doesn't have dual-core support. This is where things break for you. And I do not recommend fixing the issues in MTB1.1.

Please use ModusToolbox 2.0 and above versions for developing any new applications. ModusToolbox 1.1 and 2.0 have completely different project flows and are not directly compatible.

Please download the latest version of ModusToolbox 2.1 and proceed to create your application. The steps are pretty simple and you can find them in the API Reference Manual at the path: <app_folder>/libs/dfu/docs/

You can make use of this KBA as well: Set Up a Basic DFU Application in ModusToolbox 2.0 for PSoC 6 MCU Device – KBA229130

Regards,

Dheeraj

View solution in original post

7 Replies
DheerajK_81
Moderator
Moderator
Moderator
First comment on KBA First comment on blog 5 questions asked

Can you please attach your project and post-build scripts to understand more about your issue?

Regards,

Dheeraj

0 Likes

DheerajK_81

Enclosed you can find the project with 2 APPs.

Regards,

0 Likes

Just Realized that, the project my previous export may not be valid.

here you can see another export example.

Regards

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Hi OkBa_4438736​,

The custom linker script file for Cm0 "dfu_cm0.ld" is missing on both the projects. Can you please add the ld files and try again? This could be the reason for app1 core0 memory region missing from the final elf file.

pastedImage_0.png

Please use this project as reference

https://www.cypress.com/documentation/code-examples/ce213903-psoc-6-mcu-basic-device-firmware-update...

Regards,

Bragadeesh

Regards,
Bragadeesh
0 Likes

Hi BragadeeshV_41

The project I shared is already based on CE213903. Having both of  "dfu_cm4.ld" and "dfu_cm0p.ld" files in the project folder does not change anything. However I realized that in the project settings only "dfu_cm4.ld" is used.

linker.jpg

Regards,

0 Likes

BragadeeshV_41​  and DheerajK_81

CE213903 is based on MTB 1.0 where dual core is supported, thus there are two main.c files, one for each processor. My guess is that the image (ELF) for CM0p is created and merged at compile time.

However, I am using MTB 1.1 (or maybe MTB 2.1. after an upgrade), which means dual core is not supported, so the main.c for CM0p is not valid anymore. Therefore, a precompiled image for CM0p ( psoc6_01_cm0p_sleep_signed.elf) is used to merge with the image for CM4 to create the final ELF file.

That is what I have been doing (in a postbuild script) so far, which did not work out.

0 Likes

For the code example CE213903 based on ModusToolbox 1.0 to work in ModusToolbox 1.1 you need to make a lot of changes in the linker scripts for things to work mainly because 1.1 doesn't have dual-core support. This is where things break for you. And I do not recommend fixing the issues in MTB1.1.

Please use ModusToolbox 2.0 and above versions for developing any new applications. ModusToolbox 1.1 and 2.0 have completely different project flows and are not directly compatible.

Please download the latest version of ModusToolbox 2.1 and proceed to create your application. The steps are pretty simple and you can find them in the API Reference Manual at the path: <app_folder>/libs/dfu/docs/

You can make use of this KBA as well: Set Up a Basic DFU Application in ModusToolbox 2.0 for PSoC 6 MCU Device – KBA229130

Regards,

Dheeraj