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In AN87216 FLAGC is "Thread_1_DMA_WaterMark", is it really used in the state machine?
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Hello,
Yes, you can find it in master's GPIF project. The state transition from DO_IN_DATA to RD_SHORT_PKT is !ADDR_CNT_HIT&FLAG_C.
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
Yes, you can find it in master's GPIF project. The state transition from DO_IN_DATA to RD_SHORT_PKT is !ADDR_CNT_HIT&FLAG_C.
Best Regards,
Jayakrishna
Jayakrishna
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According to AN87216 :
"
A short packet is identified when there is no more data in the DMA buffer of slave FX3 and the ADDR_CNT_HIT event is not generated. Then, the state machine moves to the RD_SHORT_PKT state and calls INT_CPU action. This generates an interrupt to FX3 firmware, and there we are wrapping up the DMA channel. Look for CyFxApplnGPIFEventCB() in the attached firmware
"
Then FLAGC is used for slave to report "there is no more data in the DMA buffer". When will this happen? Will this happen if master and slave are configured to use the same size of DMA buffer and every packet sent/received by PC is a multiple of the DMA buffer size? Then can FLAGC be removed?
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Commonly master and slave use the same DMA buffer size, then if it is sure there won't be short packet, then can the short-packet related paths in the state machine of both master and slave be removed?
Will it be sure there won't be short packet if the host program always send/receive of packet whose size is multiple of the DMA packet size?
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Hello,
If the slave and master is having the same DMA buffer size and if you are sending multiples of DMA buffer size only from slave and master control center, then there wont be any problem even if you remove the short packet related paths in the state machine of both master and slave. But it will not interfere in the normal working even if it exists.
Best Regards,
Jayakrishna
Jayakrishna