#include "cy_pdl.h" #include "cyhal.h" #include "cybsp.h" #include "cy_retarget_io.h" #include "cyhal_lptimer.h" #include <stdio.h> #include <stddef.h> #include <stdlib.h> #include <stdbool.h> #include <stdint.h> /* Assign pins for SD Host on SDHC1 */ #define SDHC1_PORT1 (P12_0_PORT) #define SDHC1_PORT2 (P13_0_PORT) #define SDHC1_IO_VOLT_SEL_NUM (P12_7_NUM) #define SDHC1_CARD_DETECT_N_NUM (P12_1_NUM) #define SDHC1_CARD_MECH_WRITE_PROT_NUM (P12_2_NUM) #define SDHC1_LED_CTRL_NUM (P12_3_NUM) #define SDHC1_CARD_IF_PWR_EN_NUM (P12_6_NUM) #define SDHC1_CARD_EMMC_RESET_N_NUM (P12_0_NUM) #define SDHC1_CARD_CMD_NUM (P12_4_NUM) #define SDHC1_CLK_CARD_NUM (P12_5_NUM) #define SDHC1_CARD_DAT_3TO00_NUM (P13_0_NUM) #define SDHC1_CARD_DAT_3TO01_NUM (P13_1_NUM) #define SDHC1_CARD_DAT_3TO02_NUM (P13_2_NUM) #define SDHC1_CARD_DAT_3TO03_NUM (P13_3_NUM) /* Allocate context for SD Host operation */ cy_stc_sd_host_context_t sdHostContext; void my_disk_initialize(void) { // Enable SD Host Cy_SD_Host_Enable(SDHC1); // Assign and Configure Pins /* Connect SD Host SDHC function to pins */ Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_IO_VOLT_SEL_NUM, P12_7_SDHC1_IO_VOLT_SEL); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_DETECT_N_NUM, P12_1_SDHC1_CARD_DETECT_N); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_MECH_WRITE_PROT_NUM, P12_2_SDHC1_CARD_MECH_WRITE_PROT); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_LED_CTRL_NUM, P12_3_SDHC1_LED_CTRL); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_IF_PWR_EN_NUM, P12_6_SDHC1_CARD_IF_PWR_EN); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_EMMC_RESET_N_NUM, P12_0_SDHC1_CARD_EMMC_RESET_N); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CARD_CMD_NUM, P12_4_SDHC1_CARD_CMD); Cy_GPIO_SetHSIOM(SDHC1_PORT1, SDHC1_CLK_CARD_NUM, P12_5_SDHC1_CLK_CARD); Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO00_NUM, P13_0_SDHC1_CARD_DAT_3TO00); Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO01_NUM, P13_1_SDHC1_CARD_DAT_3TO01); Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO02_NUM, P13_2_SDHC1_CARD_DAT_3TO02); Cy_GPIO_SetHSIOM(SDHC1_PORT2, SDHC1_CARD_DAT_3TO03_NUM, P13_3_SDHC1_CARD_DAT_3TO03); /* Configure pins for SDHC operation */ Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_IO_VOLT_SEL_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_DETECT_N_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_MECH_WRITE_PROT_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_LED_CTRL_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_IF_PWR_EN_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_EMMC_RESET_N_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CARD_CMD_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT1, SDHC1_CLK_CARD_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO00_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO01_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO02_NUM, CY_GPIO_DM_STRONG); Cy_GPIO_SetDrivemode(SDHC1_PORT2, SDHC1_CARD_DAT_3TO03_NUM, CY_GPIO_DM_STRONG); // Assign Clock Source /* Note: The CLK_HF2 input clock must be configured and enabled. */ /* Apply the CLK_HF2 divider to have CLK_HF2 = 100 MHz. */ Cy_SysClk_ClkHfSetSource(2u, CY_SYSCLK_CLKHF_IN_CLKPATH0); Cy_SysClk_ClkHfSetDivider(2u, CY_SYSCLK_CLKHF_NO_DIVIDE); Cy_SysClk_ClkHfEnable(2u); // Configure SD Host /* Populate configuration structure */ const cy_stc_sd_host_init_config_t sdHostConfig = { .dmaType = CY_SD_HOST_DMA_ADMA2, .enableLedControl = false, .emmc = false, }; /* Configure SD Host to operate */ (void) Cy_SD_Host_Init(SDHC1, &sdHostConfig, &sdHostContext); // Initialize the card cy_en_sd_host_card_type_t cardType; uint32_t rca; cy_en_sd_host_card_capacity_t cardCapacity; /* Populate configuration structure */ cy_stc_sd_host_sd_card_config_t sdCardConfig = { .lowVoltageSignaling = false, .busWidth = CY_SD_HOST_BUS_WIDTH_4_BIT, .cardType = &cardType, .rca = &rca, .cardCapacity = &cardCapacity, }; /* Initialize the card */ (void) Cy_SD_Host_InitCard(SDHC1, &sdCardConfig, &sdHostContext); } void my_disk_read(void) { /* Note: SD Host and the card must be initialized in ADMA2 or SDMA * mode before using the code below. */ #define NUM_BLOCKS 1 cy_stc_sd_host_write_read_config_t data; cy_en_sd_host_status_t ret; uint8_t rxBuff[CY_SD_HOST_BLOCK_SIZE * NUM_BLOCKS]; /* Data to read. */ uint8_t txBuff[CY_SD_HOST_BLOCK_SIZE * NUM_BLOCKS]; /* Data to write. */ for (int d = 7; d < 0xff; d++) { memset(txBuff, d, sizeof(txBuff)); /* Fill the array with data to write. */ data.address = 0UL; /* The address to write/read data on the card or eMMC. */ data.numberOfBlocks = NUM_BLOCKS; /* The number of blocks to write/read (Multi block write/read). */ data.autoCommand = CY_SD_HOST_AUTO_CMD_NONE; /* Selects which auto commands are used if any. */ data.dataTimeout = 12UL; /* The timeout value for the transfer. */ data.enReliableWrite = false; /* For EMMC cards enable reliable write. */ data.enableDma = true; /* Enable DMA mode. */ data.data = (uint32_t*)txBuff; /* The pointer to data to write. */ printf("txBuff[%d] = ", sizeof(txBuff)); for (int i = 0; i < sizeof(txBuff); i++) { printf("%x ", txBuff); } printf("\n"); printf("Try to write...\n"); ret = Cy_SD_Host_Write(SDHC1, &data, &sdHostContext); /* Write data to the card. */ if (CY_SD_HOST_SUCCESS == ret) { while (CY_SD_HOST_XFER_COMPLETE != (Cy_SD_Host_GetNormalInterruptStatus(SDHC1) & CY_SD_HOST_XFER_COMPLETE)) { /* Wait for the data-transaction complete event. */ } } data.data = (uint32_t*)rxBuff; /* The pointer to data to read. */ printf("Try to read...\n"); ret = Cy_SD_Host_Read(SDHC1, &data, &sdHostContext); /* Read data from the card. */ if (CY_SD_HOST_SUCCESS == ret) { while (CY_SD_HOST_XFER_COMPLETE != (Cy_SD_Host_GetNormalInterruptStatus(SDHC1) & CY_SD_HOST_XFER_COMPLETE)) { /* Wait for the data-transaction complete event. */ } /* Clear the data-transaction complete event. */ Cy_SD_Host_ClearNormalInterruptStatus(SDHC1, CY_SD_HOST_XFER_COMPLETE); } printf("rxBuff[%d] = ", sizeof(rxBuff)); for (int i = 0; i < sizeof(rxBuff); i++) { printf("%x ", rxBuff); } printf("\n"); Cy_SysLib_Delay(1000UL); } } int main(void) { cy_rslt_t result; result = cybsp_init(); if (result != CY_RSLT_SUCCESS) { CY_ASSERT(0); } __enable_irq(); result = cy_retarget_io_init(CYBSP_DEBUG_UART_TX, CYBSP_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE); if (result != CY_RSLT_SUCCESS) { CY_ASSERT(0); } my_disk_initialize(); my_disk_read(); return 0; } | 
