s70fs01gs clarification for CR1V QUAD bit behavior after CR2V QPI bit set to 1

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MiYa_4339256
Level 1
Level 1

Hi Expert,

Please help clarify the CR1V QUAD bit behavior after CR2V QPI bit set to 1.

There are two descriptions in the datasheet as below:

1. From spec the CR1V description: "The QUAD bit must be set to one when using the Quad I/O Read, DDR Quad I/O Read, QPI mode (CR2V[6] = 1), and Read Quad ID commands."

2. From spec the CR2V description: "When this bit is set to QPI mode, the QUAD bit is also set to Quad mode (CR1V[1]=1). When this bit is cleared to legacy SPI mode, the QUAD bit is not affected."

So from the CR1V description, seems like the CR1V QUAD bit needs to be set '1' before set CR2V QPI bit to '1'.

From the CR2V description, seems like the CR1V QUAD bit needs to be set to '1' automatically when CR2V QPI bit set to '1'.

Which is the correct behavior for the CR1V QUAD bit after the CR2V QPI is set to '1' by WRAR (71h) command?

Thanks,

Mike

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1 Solution
Apurva_S
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi Mike,

Thank you for contacting Cypress Semiconductor.

  • The difference between Quad mode and QPI mode is that the instructions in QPI mode is also transferred on four IO lines, however the instructions in Quad mode are sent on a single line.
  • When QPI mode is enabled by setting the QA_NV bit (CR2NV[6]) bit the QUAD_NV bit (CR1NV[1]) automatically gets set. However, when the QA_NV bit is reset it does not have any effect on the QUAD_NV bit.
  • Similarly, when the QA (CR2V[6]) bit is set to QPI Mode, the QUAD bit (CR1V[1]) is also set to Quad Mode (CR1V[1]=1). When this bit is cleared to legacy SPI Mode, the QUAD bit is not affected.
  • I would like to inform you that Single SPI commands still continue to work in Quad mode but not in QPI mode. In QPI mode, all instructions, address and data are sent and received on four IO lines.

Please let me know if you have any more questions.

Best Regards,

Apurva

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2 Replies
Apurva_S
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi Mike,

Thank you for contacting Cypress Semiconductor.

  • The difference between Quad mode and QPI mode is that the instructions in QPI mode is also transferred on four IO lines, however the instructions in Quad mode are sent on a single line.
  • When QPI mode is enabled by setting the QA_NV bit (CR2NV[6]) bit the QUAD_NV bit (CR1NV[1]) automatically gets set. However, when the QA_NV bit is reset it does not have any effect on the QUAD_NV bit.
  • Similarly, when the QA (CR2V[6]) bit is set to QPI Mode, the QUAD bit (CR1V[1]) is also set to Quad Mode (CR1V[1]=1). When this bit is cleared to legacy SPI Mode, the QUAD bit is not affected.
  • I would like to inform you that Single SPI commands still continue to work in Quad mode but not in QPI mode. In QPI mode, all instructions, address and data are sent and received on four IO lines.

Please let me know if you have any more questions.

Best Regards,

Apurva

Hi Apurva,

I'm clear now. thanks.

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