Configuration for PSoC4S Clock component

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YoIs_1298666
Level 5
Level 5
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Hello,

I have three questions about PSoC4S Clock component.

I am using for PWM.

pastedImage_0.png

I tried three kind of configuration for Clock component.

In this case, I set the HFCLK as trimmed with WCO.

1.if "Clock type" is selected to "Existing", I have an compile errors like below.

   Why?

pastedImage_1.png

2. if "Clock type" is selected to "New", "Source" is "Auto" and "Tolerance" is +/-0%,

    is the clock accuracy ensured to +/-0.2% that is HFCLK's one?

pastedImage_0.png

pastedImage_6.png

3. if "Clock type" is selected to "New", "Source" is "Auto" and "Tolerance" is +/-5%,

    will the clock accuracy be within 5% or will be ensured to +/-0.2% that is HFCLK's one?

pastedImage_2.png

Best regards,

Yocchi

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1 Solution

Hi Yocchi,

>>The answer for your Q2  is as below

PSoC Creator automatically locates available source clock that, when divided down, provides the most accurate resulting frequency.

Clocks with a source of <Auto> may only enter a desired frequency. A tolerance may also optionally be provided.

Therefore whenever the tolerance selected is lesser than the actual tolerance of the automatically selected clock , PSOC creator throws a warning.

>>The answer for your Q3  is as below

Depending upon the settings the tolerance may vary.

In this case it is greater than 0.2% but less than 5%

If it is within this range in this case then it wont throw an error/warning.

Regards

Alakananda

Alakananda

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Alakananda_BG
Moderator
Moderator
Moderator
50 likes received 250 sign-ins 250 replies posted

Hi Yocchi,

Can you please refer to the below screenshot, which will help you to understand why HFCLK cannot be used directly.

pastedImage_0.png

Regards,

Alakananda

Alakananda
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Hello Alakananda-san,

I am sorry that I can not understand what you say.

For example, if "Source" of Clock_1 is selected to HFClk, it can compile and run well.

pastedImage_0.png

Best regards,

Yocchi

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Hi Yocchi,

The clock input to the PWM should be synchronized with the PWM output such as capture etc.

This synchronization operation is fed by the help of higher frequency (HFCLK) clock.Thus you need to provide a lower frequency clock as input to PWM.

Regards

Alakananda

Alakananda
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Hello Alakananda-san,

OK. I agree with you about Q1.

Please answer Q2 and Q3.

Best regards,

Yocchi

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Hi Yocchi,

>>The answer for your Q2  is as below

PSoC Creator automatically locates available source clock that, when divided down, provides the most accurate resulting frequency.

Clocks with a source of <Auto> may only enter a desired frequency. A tolerance may also optionally be provided.

Therefore whenever the tolerance selected is lesser than the actual tolerance of the automatically selected clock , PSOC creator throws a warning.

>>The answer for your Q3  is as below

Depending upon the settings the tolerance may vary.

In this case it is greater than 0.2% but less than 5%

If it is within this range in this case then it wont throw an error/warning.

Regards

Alakananda

Alakananda
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Hello Alakananda-san,

Thank you very much.

In case of Q2, the clock accuracy is +/-0.2%, right?

Best regards,

Yocchi

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Hi Yocchi,

In case of Q2, the clock accuracy is +/-0.2%, right?

>>Yes

Regards

Alakananda

Alakananda
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Hello Alakananda-san,

Thank you very much.

Best regards,

Yocchi

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