1 Reply Latest reply on Jan 21, 2020 8:31 PM by BragadeeshV_41

    Interfacing with an LTC2324 ADC


      We are looking to interface a PSOC 6 to an LTC2324-16 ADC (16 bit conversions) with a PSOC6.  The LTC2324 is a 4 channel, simultaneously sampled ADC, with an SPI interface (each ADC conversion is a 64-bit transaction).  However, to increase throughput, there are 4 simultaneous MISO outputs (slave to master data).  In this way, the ADC can send out data 4 times as fast (I.E. it has 4 "MISO lanes" to get the data out faster [4 outputs, each stream is 16 bits], as opposed to a conventional single MISO that 4 ADC results are daisy-chained to [1 output stream at 64 bits]).


      Normally, stock PSOC components do not support this 4-lane MISO interface.  In order to interface this custom ADC to a PSOC6, I was going to use a regular SPI master interface with no MISO pin, and then I will make 4 digital input pins with a shift register behind each pin:


      (15 D-type flip-flops per input stream) X (4 inputs) = 60 flip-flops


      All flip-flops would share the common clock generated from the LTC2324.  I would then use Status registers (8 bits per status register --> 8 of them needed to read all 64 ADC bits) to get all 4 ADC results into the firmware.


      --> Before I get too deep in the weeds, would this approach work?  Am I missing something?