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Hi All,
I need a design that connects the internal 1.024V(Bandgap) to an external pin.
Then, I made "Workspace02.zip" design based on "Vref_route.zip" design.
PSoC is PSoC 4200L family.
[Q1]
I'd like to change P1[3] of opamp output to P6[4].
Could you tell me how to achieve this?
[Q2]
Are there any method that connects the internal 1.024V(Bandgap) to P5[2] or P5[3]?
If there is no Q1 method, I need to consider the Q2 method.
Best Regards.
Yaku
Solved! Go to Solution.
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When setting the ADC SAR reference voltage to "1.924V internal bypassed" you will get the reference voltage at the bypass pin. From there you can connect ti ti a opamp buffer. The pins for opamps are not freely to choose, they are fixed.
Bob
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When setting the ADC SAR reference voltage to "1.924V internal bypassed" you will get the reference voltage at the bypass pin. From there you can connect ti ti a opamp buffer. The pins for opamps are not freely to choose, they are fixed.
Bob
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Hi Bob-san,
Thank you for your response.
I have an idea.
Could you give me advice on my ideas?
[Q3]
I’d like to confirm about analog routing.
Fig.1 shows PSoC Creator screen.
However, SARREF connection is not visible on this screen.
I understand that SARREF is connected as shown in Fig.2.
Is my understanding correct?
[Q4]
Is it possible to output 1.024V(Internal Bandgap) to P5 [3] by analog routing(Red Line) as shown in Fig.3?
Best regards.
Yaku
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Hi Bob-san,
This is just a friendly reminder that I’m waiting for your reply.
Best regards.
Yaku
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Answering your last question exceeds my limits.
Bob
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Dear Yaku san,
Your understanding is NOT right. The external vref is routed from the pin 1.7 to the external_vref point. The signal is not buffered through the reference buffer, but rather connected directly to the reference input. So this is not routed through the SARREF mux.
Best Regards,
Vasanth