Loadable Counter

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IvPa_1668871
Level 1
Level 1

Is there an app note showing how to implement loadable counter, please ? E.g. 16 bit down counter where an initial value is set by software.

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Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

ivpa,

Here's an example project where a random number can be loaded into the counter.  In this example, the timer (used as a counter) counts down once every 10 msecs.  Pretty slow but it allows the terminal update to be readable.  It loads a new random number every time it finishes a countdown.

I've implemented this on a 16-bit timer but for the purposes of this example I only allow 1 to 100 as a random number load.

Len

Len
"Engineering is an Art. The Art of Compromise."

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Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

ivpa,

Here's an example project where a random number can be loaded into the counter.  In this example, the timer (used as a counter) counts down once every 10 msecs.  Pretty slow but it allows the terminal update to be readable.  It loads a new random number every time it finishes a countdown.

I've implemented this on a 16-bit timer but for the purposes of this example I only allow 1 to 100 as a random number load.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Thanks for your help.

I found the solution in AN82156, chapter 6, Project #1 - 8 Bit Down Counter.

I also realized that I have to go to Verilog in order to finalize my project.

Is it possible to create a component and then add it to the Cypress Component Catalog in PSoC Creator ?

I am willing to add the components which I create.

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IvPa,

Yes.  you can create components and share them with the PSoC community.   I'm not an expert in this matter.  There are others with more experience in Verilog and component creating.  There should be some app notes to help.  I believe there is component authoring information in the Help menu of PSoC Creator.

Len

Len
"Engineering is an Art. The Art of Compromise."
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