- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Question regarding S25FL128S/S25FL256S flash devices with both VIO and VCC, and the treatment of CS#. The datasheet says that CS# must be pulled high during power up, ideally tracking VCC. But if VIO is at a lower voltage than VCC, (say VIO = 1V8) then wouldn’t pulling CS up to VCC violate the allowable VINH?
Suppose CS is pulled up to VIO, but VIO is powered up at a later time than VCC (say at some time after tpu) :. CS# does not follow VCC; will asserting RESET# after VIO comes up ensure that the device is properly initialized?
Solved! Go to Solution.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
Yes, asserting RESET# signal LOW for at least tRP time (after VIO powered up) will cause device reset. RESET# causes the same initialization process as is performed when power comes up and requires tPU time. So, device will be in standby state after reset operation. More details about RESET# operation is available in our datasheet (https://www.cypress.com/file/448601/download , page 9).
Thanks and Regards,
Sudheesh
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
Yes, asserting RESET# signal LOW for at least tRP time (after VIO powered up) will cause device reset. RESET# causes the same initialization process as is performed when power comes up and requires tPU time. So, device will be in standby state after reset operation. More details about RESET# operation is available in our datasheet (https://www.cypress.com/file/448601/download , page 9).
Thanks and Regards,
Sudheesh