Hello _How can I make 16bit divider by UDB

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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

I agree with /oddissey1-san,

16bit divider using UDB may not be a good idea.

If you need to desing 16bit divider, consider FPGA

or use software approach.

Having said that, as my habit...

I ran some search and following seems to be one of the simplest implementation.

Verilog Coding Tips and Tricks: Synthesisable Verilog code for Division of two binary numbers

I made a symbol

004-symbol.JPG

I tried to port the verilog source

003-verilog.JPG

And when I tried to generate application

001-UDB-Errors.JPG

So at least CY8CKIT-059's UDB is by far smaller than the requirement.

Then I tried 8 bit

005-Error_8bit.JPG

Still not enough. (getting close though)

So I tried 4bit!

Now it could be compiled!

The Tera Term output was

006-teraterm_4bit.JPG

symbol for 4bit

008-4bit-symbol.JPG

verilog for 4bit

009-bit-verilog.JPG

schematic for 4 bit

007-schematic.JPG

main.c

==================

#include "project.h"

#include "stdio.h"

#include "tty_utils.h"

void init_hardware(void)

{

    CyGlobalIntEnable; /* Enable global interrupts. */

    tty_init() ;

}

int main(void)

{

    uint16_t a, b, q ;

  

    init_hardware() ;

  

    splash("UDB 16bit divider test") ;

  

    print("Enter A B\n") ;

  

    prompt() ;

    for(;;)

    {

        if (get_line()) {

            sscanf(str, "%hd %hd", &a, &b) ;

            A_LSB_Write( a & 0xF ) ;

            B_LSB_Write( b & 0xF ) ;

            q = Q_LSB_Read() ;

            snprintf(str, STR_BUF_LEN, "%d / %d = ", a, b ) ;

            print(str) ;

            snprintf(str, STR_BUF_LEN, "%d\n", q) ;

            print(str) ;

            prompt() ;

        } 

    }

}

==================

Well, I'm glad that it's a public holiday in Japan 😉

moto

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5 Replies
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

TaAl,

I haven't seen hardware divider implementation in PSoC, probably that's not possible or impractical. It would be better if you can describe why you need hardware adder and divider.

/odissey1

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lock attach
Attachments are accessible only for community members.
MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

I agree with /oddissey1-san,

16bit divider using UDB may not be a good idea.

If you need to desing 16bit divider, consider FPGA

or use software approach.

Having said that, as my habit...

I ran some search and following seems to be one of the simplest implementation.

Verilog Coding Tips and Tricks: Synthesisable Verilog code for Division of two binary numbers

I made a symbol

004-symbol.JPG

I tried to port the verilog source

003-verilog.JPG

And when I tried to generate application

001-UDB-Errors.JPG

So at least CY8CKIT-059's UDB is by far smaller than the requirement.

Then I tried 8 bit

005-Error_8bit.JPG

Still not enough. (getting close though)

So I tried 4bit!

Now it could be compiled!

The Tera Term output was

006-teraterm_4bit.JPG

symbol for 4bit

008-4bit-symbol.JPG

verilog for 4bit

009-bit-verilog.JPG

schematic for 4 bit

007-schematic.JPG

main.c

==================

#include "project.h"

#include "stdio.h"

#include "tty_utils.h"

void init_hardware(void)

{

    CyGlobalIntEnable; /* Enable global interrupts. */

    tty_init() ;

}

int main(void)

{

    uint16_t a, b, q ;

  

    init_hardware() ;

  

    splash("UDB 16bit divider test") ;

  

    print("Enter A B\n") ;

  

    prompt() ;

    for(;;)

    {

        if (get_line()) {

            sscanf(str, "%hd %hd", &a, &b) ;

            A_LSB_Write( a & 0xF ) ;

            B_LSB_Write( b & 0xF ) ;

            q = Q_LSB_Read() ;

            snprintf(str, STR_BUF_LEN, "%d / %d = ", a, b ) ;

            print(str) ;

            snprintf(str, STR_BUF_LEN, "%d\n", q) ;

            print(str) ;

            prompt() ;

        } 

    }

}

==================

Well, I'm glad that it's a public holiday in Japan 😉

moto

Thanks for your efforts

TaAl,

I coded some Neural Network about 20 years ago . From that experience, PSoC UDB is not appropriate tool for NN implementation. If stuck with PSoC,  better approach would be to code it in C.

/odissey1

I am trying to implement a simple trained neural network on psoc and i need adder and divider for some mathematical calculations.
I don't have enough knowledge in HW,So thank you for your help

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