SPI corrupting LSB bit during read

[HeGi_2497906]

Hello and let me start by saying I think this is a signal integrity issue, but cannot explain it.

I am communicating with a BMA253 accelerometer and on read the data in the receive buffer flips the LSB to a 1 if it is a zero.  On the scope I see the correct commands and data in both directions, but there is ~0.5V of rolling noise on the signals, not sure where that is coming from.  I have tried every combination of control the SPI component has.  The device accepts modes 0,0 and 1,1, tried late sampling, more and less over sampling, median filter, different clock rates (will come back to this).  I even tried adding a third byte to the read, to ensure that the CS was sufficient during the transfer.  There is an SPI FLash memory on the buss, but I have not even tried talking to that yet, I assumed this would be simpler.  I have attached my bundle.

Other topics on this, I cannot get the SPI to function below 1.5Mbs, the BMA253 device has no min frequency, and the SPI UCB DS does not specify min and max frequencies, yet below 1.5Mbs there is no SPI activity, can you help me understand the difference.

ECO vs IMO, which is a better clock, my next test will be to run the system from the IMO not the ECO and see if the noise on the clock get any better, which is the cleanest internal clock?

Thanks for looking, this is really an issue, and like I said to start, most likely a signal integrity problem, but it only flips the LSB, which is odd, if it were truly noise on the data line, other bits would be flipping.

Herb

[Bob_Marlowe]

Difficult to solve issue. As a matter of fact, there are a couple of thousands SPI interfaces running on Cypress PSoCs in the world. So there might be no inherant error.

Can we have some more information, please:

Cypress KIt (which one?) or self-made PCB?

How do you check the bit-flipping? Pictures??

Can you please post your complete project or a shortened version that shows the error so that we all can have a look at all of your settings. To do so, use

Creator->File->Create Workspace Bundle (minimal)

and attach the resulting file.

Bob

[HeGi_2497906]

Hi Bob and thanks for the fast reply.

I thought I did add my bundle? Adding it now.

It is our PCB and I was testing it by looping on a write/read to a register that allows full write on all 8 bits, incrementing a counter after each read, breaking on each time, if the LSB was Zero it would flip to a One, no other bits would flip.

I just solved it by switching from the ECO to the IMO, I had tried slowing down the ECO, but that did not work, so I am assuming the IMO is a more stable clock and it was a clock jitter issue, any thoughts on that?

Bigger question, why the SPI only works at 1.5Mhz, on either clock, very odd?  Slower and I get one clock out and then nothing, faster and it reverts to 1.5Mhz actual data rate?

Herb

[BragadeeshV · Accepted solution]

hI HeGi_2497906​,

The data rate can be modified by changing the oversampling parameter.

Data rate = SCB Clock frequency/ Oversampling.

The component will try to compute the scb clock frequency required based on the data rate and oversampling parameter that you enter in the GUI. You will be able to achieve higher data rates by decreasing the oversampling factor for a given SCB clock frequency.

ECO could lead to bad accuracy in case of improper load capacitance as seen by the oscillator . This can be tuned to achieve better clock accuracy (0 ppm) as described  section 4.1 Crystal Tuning Procedure for Designs with PSoC 4/PRoC BLE Devices in the app note: PSoC /PRoC BLE Crystal Oscillator Selection and Tuning Techniques.

You can refer to the article ECO Capacitance Trim Values for EZ-BLE™ Modules - KBA218990​ to load the right ECO trim value for your EZ_BLE module.

Regards,

Bragadeesh