UART_TX_STATUS_FIFO_EMPTY

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alfi_297226
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5 questions asked Welcome! 5 replies posted

Creator Version:4.1

Device : 5LP

Attachments: PNG image of  C code snip

I iterate through a long loop and transmit a 72 character array over RS-232 if the host computer has requested an array readout.

At first, I used all 4 bytes of my hardware-only FIFO each time and then verified that the FIFO was empty using line 503 before putting 4 more bytes into the array. See attached code snip.. It didn't work - only 40 bytes made it out over RS-232 to the HOST computer (I verified that only 40 bytes were being sent using a scope).

I then commented out lines 505-507 and changed line 508 to increment the index by one instead of 4. Now it works - All 72 bytes are sent correctly.

What did I do wrong with my original attempt? 

Thanks,

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Rakshith
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Hi alfi_297226

Replace all the code lines that you have sent (Tx FIFO.JPG) in your query (lines 500 - 507) with these lines -

pastedImage_0.png

This might fix your issue. But it is always recommended to use PutChar() function, as shown below. PutChar() appends the FIFO whenever there is availability of space in FIFO.

pastedImage_1.png

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B

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Len_CONSULTRON
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alfi,

I'm in agreement with you, I can't see any reason why only 40 bytes are transmitted. (At least by virtue of the code snippet you provided)  Unless another logic condition exists not shown in your snippet, at least 72 bytes should have been transmitted in 18 4-byte FIFO sections.

An advantage of the 1-byte incrementing is that non-4-byte aligned data can be transferred.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Rakshith
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Hi alfi_297226

Can you please share your project so that we can reproduce the same issue from our end.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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The project archive is attached. I have stripped main.c of all but code needed to show the problem so the lines in question are now at lines 87-95. This version of main.c sends 72 bytes every 4 seconds. It will run on CY8CKIT with TX jumpered to P3_1 and RX jumpered to P1_6.

Thanks,

Alan

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Rakshith
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250 likes received 1000 replies posted 750 replies posted

Hi alfi_297226

Replace all the code lines that you have sent (Tx FIFO.JPG) in your query (lines 500 - 507) with these lines -

pastedImage_0.png

This might fix your issue. But it is always recommended to use PutChar() function, as shown below. PutChar() appends the FIFO whenever there is availability of space in FIFO.

pastedImage_1.png

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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Thank you for your helpful suggestions. I will proceed with one or the other. Although I should note that my original goal was to take advantage of all 4 bytes of the Tx FIFO such that 4 bytes could be handled with hardware only - without resorting to any blocking code - so software could attend to other things during the 4 byte transmission interval.

It seems there should be a way to fill the FIFO without resorting to blocking but I guess there is not.

Thanks,

Alan

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Alan,

Actually the PSoC provides an excellent and reliable mechanism for HW assisted UART communication.  I've successfully used DMA to transfer all the bytes in a buffer to a UART without intervening SW.  SW is only use for initial setup and to know when the buffer is completed.  Virtually 0% CPU overhead!

Len

Len
"Engineering is an Art. The Art of Compromise."
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Rakshith
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Hi  alfi_297226

You can use the following methods to reduce CPU overhead for filling out the FIFO UART buffer -

1. Using DMA to transfer data like LePo_1062026​ mentioned.

2. Configuring buffer interrupts and loading data in the ISR.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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Alan,

As Rakshith indicated, he provided two options.

Option 0: Polling.  This is the method you chose in your project.  This is usually workable but you were trying to avoid the UART_PutChar() blocking.  If this is a requirement, then use Options 1 or 2 or 2a.

Option 1:  DMA.  This can provide near 0% CPU overhead.  DMA is a bit more complicated to set up.  Once you learn how to manipulate the DMA TDs you're at maximum HW state machine efficiency.   Creating a robust HW state machine to minimize SW dependency is why I appreciate the PSoC architecture.

I use the DMA as much as practical when I'm executing a project when I need as much CPU available for the application .  I will use either polling or interrupt for experimental code where comm process is not critical.

If you need very fast UART speeds, DMA may be required.  For example, I developed a PSoC project that implements the DMX512 protocol which requires the UART at 250Kbps.  That basically required a DMA to make sure the data stream could meet requirements.

Option 2: Interrupts.  This is the simpler method most commonly used.   This can be used effectively as a non-blocking implementation.  CPU overhead varies based on the amount of code executed.  Interrupt priority and interrupt collisions could be an issue if your UART comm needs to be more synchronous.  Less critical if your UART comm is fully asynchronous.

Option 2a: Interrupts with CPU BUS_CLK @ max.  You project operates at 48MHz BUS_CLK.  If is possible to source the PLL at 66 MHz and get a 37% increase in CPU speed.  It still inherits the pros and cons with Option 2.

Len

Len
"Engineering is an Art. The Art of Compromise."

Thanks for all the suggestions Rakshish and Len.

I will likely switch to DMA for production-type design if necessary.

Presently I am using ISR to service the Rx FIFOs of the two full duplex UARTs in my design and I'm using UART_PutChar() for Tx.

All is working well enough for the moment.

-Alan

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