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Hi Cypress team,
I get mipi problem when i try to stream a video from 2MP Sensor RAW8 at 30 fps.
I can easily make this camera works through a Serializer-Deserializer but when i'm connecting directly the camera to the cypress CX3 board i get that :
I display some debug information each 1 second, and the gpif stay at the state 2, and sometimes i get ctrErrCnt.
There is the mipi config used :
If you have any idea it can help a lot !
Thank you,
JZ
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JZ,
Here, CX3 Configuration(MIPI) you said it worked for you with 16 bits parallel interface right?
Why did you again go back to 8-bit output format?
Please find the description of errors.
frmErrCnt; /**< Framing Error Count*/ - This field is incremented when an un-expected Frame start or Frame end short packet is received
crcErrCnt; /**< CRC Error Count*/ - This counter is incremented when a HS packet is received with crc errors.
mdlErrCnt; /**< Multi-Data Lane Sync Byte Error Count*/ - This counter is incremented when HS Sync Bytes were not received at the same clock cycle by CSI2 Rx
ctlErrCnt; /**< Control Error (Incorrect Line State Sequence) Count*/ - This counter is incremented when escape mode is exited using the wrong sequence
eidErrCnt; /**< Unsupported Packet ID Error Count */ - This counter is incremented when a HS packet that is not supported by CSI-2 Rx is received.
recrErrCnt; /**< Recoverable Packet Header Error Count*/ - This counter is incremented by when a HS packet header is received with errors that are correctable by ECC.
unrcErrCnt; /**< Unrecoverable Packet Header Error Count*/ - This counter is incremented when a HS packet header is received with errors that are not correctable by ECC
recSyncErrCnt; /**< Recoverable Sync Byte Error Count*/ - This counter is incremented when a HS Sync Byte was received by Rx with correctable errors
unrSyncErrCnt; /**< Unrecoverable Sync Byte Error Count*/ - This counter is incremented when a HS Sync Byte was received by Rx with uncorrectable errors.
Streaming RAW10 Format Input Data to 16/24-bit Output Format in CX3 MIPI CSI-2 - KBA224387
You may probe HSYNC and VSYNC signals, if you have provided test pins for them. You will see proper HSYNC and VSYNC when there are no MIPI errors.
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Sorry for the delay to reply but i was in holidays.
I go back to 8 bits because it is the config working (through the deser-ser) at 30 fps. I change it to 16 bits only to make the sensor woks at 60 fps.
I probe VSYNC, HSYNC and Pixel clock on the test point on the denebola :
HSYNC -> Nothing
PIXEL CLOCK -> nothing
And VSYNC i got a weird waveform :
I have some informations :
-- Frame period = 33.27 ms
- V-Active = 29.4 ms (1300 lines)
- V-Blanking = 3.88 ms (192 lines)
-- Line period = 22.7 us
- H-Active = 16.4 us (1600 pixels)
- H-Blanking = 6.2 us (600 pixels)
- FPS = 30 fps
- RAW8
- THS-Zero : 146 ns
- THS-Prepare : 64 ns
- On the sensor the pll is configured to output MIPI_CLK = 400
- On the sensor the pll is configured to output MIPI_PCLK = 50 mhz
- Non-Continuous clock
When i probe the mipi clock lane i get 200 Mhz
Mipi configurator :
Uart output from cypress board :
Screen from mipi signals :
Correct me if i wrong.
Sorry for this long post, i try to make it clear as possible
Thank you,
JZ
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Hello,
Please find the description for MIPI errors here:
frmErrCnt; /**< Framing Error Count*/ - This field is incremented when an un-expected Frame start or Frame end short packet is received
crcErrCnt; /**< CRC Error Count*/ - This counter is incremented when a HS packet is received with crc errors.
mdlErrCnt; /**< Multi-Data Lane Sync Byte Error Count*/ - This counter is incremented when HS Sync Bytes were not received at the same clock cycle by CSI2 Rx
ctlErrCnt; /**< Control Error (Incorrect Line State Sequence) Count*/ - This counter is incremented when escape mode is exited using the wrong sequence
eidErrCnt; /**< Unsupported Packet ID Error Count */ - This counter is incremented when a HS packet that is not supported by CSI-2 Rx is received.
recrErrCnt; /**< Recoverable Packet Header Error Count*/ - This counter is incremented by when a HS packet header is received with errors that are correctable by ECC.
unrcErrCnt; /**< Unrecoverable Packet Header Error Count*/ - This counter is incremented when a HS packet header is received with errors that are not correctable by ECC
recSyncErrCnt; /**< Recoverable Sync Byte Error Count*/ - This counter is incremented when a HS Sync Byte was received by Rx with correctable errors
unrSyncErrCnt; /**< Unrecoverable Sync Byte Error Count*/ - This counter is incremented when a HS Sync Byte was received by Rx with uncorrectable errors.
The MIPI configuration is incorrect.
Please increase the Multiply value of unit clock to 95 in the MIPI Configuration tool and set the PhyTimedelay to 10 using CyU3PMipicsiSetPhyTimeDelay API after CyU3PMipicsiSetIntfParams API in Setvideoresolution function.
/* Write ResolutionSettings */
#ifndef FX3_STREAMING
status = CyU3PMipicsiSetIntfParams (&cfgUvc1080p30NoMclk, CyFalse);
if (status != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "\n\rUSBStpCB:SetIntfParams SS1 Err = 0x%x", status);
}
#endif
CyU3PMipicsiSetPhyTimeDelay(1, 10);
CyCx3_ImageSensor_Set_Resolution();
break;