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1. Re: FX2LP MPEG2-TS output to ASIC
SananyaM_56Sep 5, 2019 11:59 PM (in response to HeVa_4442466)
Hello,
You could use the slave FIFO interface (configured as 8 bit data bus) in FX2LP for streaming data in and out from ASIC. We have an example project for stream IN MPEG2-TS data as you mentioned in the App Note FX2LP TV Dongle Reference Design.
You can however modify this project with the help of the App Note FX2LP GPIF and Slave FIFO examples which configures one FX2LP to send data out on its slave FIFO interface as well.
Please let us know if you have any issues with the firmware.
Best Regards,
Sananya
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2. Re: FX2LP MPEG2-TS output to ASIC
HeVa_4442466 Sep 7, 2019 3:23 AM (in response to SananyaM_56)Thanks Sananya! I have been working with the examples you've pointed to, things are getting clearer now. Though there is one issue that I haven't been able to figure out. As you would know, in the mpeg stream each 188 byte packet starts with 0x47. At the start of the stream the ASIC expects the SOP line to be asserted, is there a simple way to do this? Maybe something like an interrupt on match or toggle a control line on data match?
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3. Re: FX2LP MPEG2-TS output to ASIC
SananyaM_56Sep 11, 2019 12:16 AM (in response to HeVa_4442466)
Hello,
As per my understanding, you would like toggle the SOP line on your ASIC based on data match in the packet header. You could use a GPIO from ports A,C or E to do the same. If you would like to assert the line after every 188 byte packet, you could also set the FLAGx pins to be asserted after 188 bytes are received. Please let me know if this answers your question?
Best Regards,
Sananya