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YuMa_1534086
Level 7
Level 7
Distributor - Macnica (Japan)
500 replies posted 250 sign-ins 10 likes received

Hello.

Customer would like to confirm reset trigger.

They would like to distinguish which reset occurred.

Is there way to confirm which reset trigger of Power On Reset, Brown out Reset and External Reset occurred?

If PSoC4(CY8C4125 has it, could you please let us know a detail of specific method for confirming such reset triggers?

And does PSoC4(CY8C4125) have BOR function?

Or does not PSoC4 have BOR, does PSoC4 have only BOD(detect only, do no reset)?

Best Regards.

Yutaka Matsubara

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1 Solution
Ekta_N
Moderator
Moderator
Moderator
750 replies posted First like given 250 solutions authored

Hello Yutaka,

Brown Out event will reset the PSoC 4 device (BOR).

A brown out event can be of two types:

Retention Brownout Reset: If VCCD dips below the minimum logic operating voltage, but not below the minimum logic retention voltage.

Non Retention Brown out event: If the VCCD dips below the minimum logic retention voltage (specifications given in the datasheet of the device: https://www.cypress.com/file/138651/download ).

It is possible to differentiate Retention Brownout Reset by using a special register, PWR_BOD_KEY. The PWR_BOD_KEY register only changes value when written by firmware or when a non-retention reset such as a non-retention BOD, XRES, or POR event.

It is not possible to distinguish non retention BOD, XRES or POR events using on chip resources.

For more details on this, please refer to the 'Identifying Reset Sources' section of the Architecture TRM: https://www.cypress.com/file/126171/download

Refer to the register TRM for details on PWR_BOD_KEY register and RES_CAUSE register: https://www.cypress.com/file/122336/download

Best Regards

Ekta

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2 Replies
Ekta_N
Moderator
Moderator
Moderator
750 replies posted First like given 250 solutions authored

Hello Yutaka,

Brown Out event will reset the PSoC 4 device (BOR).

A brown out event can be of two types:

Retention Brownout Reset: If VCCD dips below the minimum logic operating voltage, but not below the minimum logic retention voltage.

Non Retention Brown out event: If the VCCD dips below the minimum logic retention voltage (specifications given in the datasheet of the device: https://www.cypress.com/file/138651/download ).

It is possible to differentiate Retention Brownout Reset by using a special register, PWR_BOD_KEY. The PWR_BOD_KEY register only changes value when written by firmware or when a non-retention reset such as a non-retention BOD, XRES, or POR event.

It is not possible to distinguish non retention BOD, XRES or POR events using on chip resources.

For more details on this, please refer to the 'Identifying Reset Sources' section of the Architecture TRM: https://www.cypress.com/file/126171/download

Refer to the register TRM for details on PWR_BOD_KEY register and RES_CAUSE register: https://www.cypress.com/file/122336/download

Best Regards

Ekta

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YuMa_1534086
Level 7
Level 7
Distributor - Macnica (Japan)
500 replies posted 250 sign-ins 10 likes received

Hello Ekta-san.

Thank you for your reply.

I understand.

Best Regards.

Yutaka Matsubara

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