SPI_SCK has a clock before configuring FPGA

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desd_4393836
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First like given 10 replies posted 5 replies posted

Hi all,

I connected FX3 to an FPGA trying to configure FPGA using SPI.

BASED on cypress document showed below, clock should start when I start configuring the FPGA but it is always there, from the time I turn on the board. when I run configuration another clock will be added on top of the other clock and ofcourse FPGA fails!

what is going on?

20190909_152420.jpg

Thanks,

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1 Solution

Thank you for the update.

Please check it on FPGA side.

View solution in original post

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KandlaguntaR_36
Moderator
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25 solutions authored 10 solutions authored 5 solutions authored

Hello,

SPI Clock will start when we call you CyU3PSpiTransmitWords API.

I don't see any clock after downloading firmware to RAM.

Can you please let us know the steps followed by you?

Please confirm the pin that you have probed for SPI_CLK.

Regards,

Sridhar

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1. connect the board to power

2. check port GPIO53 or D4 or SPI_SCK as my SPI clock.
3. I see rectangular pulses as clock with ~1V voltage in scope.

4. I upload the firmware

5. I use FPGA CONFIGURATION UTILITY to upload the bitstream

6. I see the port GPIO53 again while I click on the upload I see another pulse added to the previous pulse for ~2V as you can see below:

7. my FPGA configuration failed.

pastedImage_1.png

Thanks,

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Hello,

1. connect the board to power

2. check port GPIO53 or D4 or SPI_SCK as my SPI clock.
3. I see rectangular pulses as clock with ~1V voltage in scope.

In USB Bootloader Mode, you are not supposed to see any clock.

Can you please test the same with Cypress explorer's kit, if you have?

Regards,

Sridhar

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Unfortunately I dont have the kit.

It is very weird! I calculated frequency of this clock before uploading firmware and it is around 2.5MHz!

What can cause this?

P.S. I didnt use SPI flash in my design. I know this should be optional. Correct?

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>> I didnt use SPI flash in my design. I know this should be optional. Correct?

Yes. It is optional.

This may be a layout issue.

Can you please load the USB Bulk Source Sink example firmware in which you have disabled SPI block and used only UART block?

Please probe the SPI_CLK line and update.

Let me know the waveform before and after loading the firmware.

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still, there is a clock inside the pin! from the time I turn this on I see a train of pulses with frequency ~2.5 MHz.

where else we have a pin that has this frequency?

I know main FX3 clock has 19.3MHz clock.

before configuring FPGA:

pastedImage_0.png

AFTER STARTING CONFIGURATION:

pastedImage_1.png

Thanks,

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UPDATE: Today I realized that when I configure FPGA by JTAG PORT this pulses disappears!!! apparently FPGA  is the source of this clock !! but why FPGA should generate this clock on SPI_SCK?!

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Thank you for the update.

Please check it on FPGA side.

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