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Hello,
I am trying to bring up a similar (simpler) SPI master test program on 20735-B1, based on the SPI master example on 20719. My SDK version is 6.4.
Some code snippet:
wiced_hal_gpio_select_function(WICED_P38, WICED_SPI_1_MOSI);
wiced_hal_gpio_select_function(WICED_P07, WICED_SPI_1_CLK);
wiced_hal_pspi_reset(SPI1);
wiced_hal_pspi_init(
SPI1,
SPI_MASTER,
0,
spi_master_get_gpio_cfg(WICED_P07, WICED_P38, WICED_P06),
2.4*1000000,
SPI_MSB_FIRST,
SPI_SS_ACTIVE_LOW,
SPI_MODE_0,
WICED_P26
);
uint8_t to_send[10] = {0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55};
wiced_hal_pspi_tx_data(SPI1, 10, to_send);
I've hooked up CLK and MOSI to an oscillator.
The CLK signal is as expected. However the MOSI output is definitely not 0x55.
Picture of sending one byte 0x55:
As you can see in the above pictures, sending the same byte 0x55 results in different wave forms.
I wonder if there is any additional configurations needed for WICED_P38 port. Or I am missing some other software setups.
I've also tried an older revision of 20735 board using WICED 4.1. Same result.
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Hi John,
Are you using CYW20735 EVAL or custom board?
Can you please try the below pin combination?
#define CLK WICED_P07
#define MISO WICED_P16
#define MOSI WICED_P06
#define CS WICED_P38
Thanks,
Anjana
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Hi Anjana,
Thank you for your reply. Yes I am using the CYW920375Q60EVB-01 eval board.
I've tried your combination:
Code copied from 20719:
uint32_t spi_master_get_gpio_cfg(uint8_t clk, uint8_t mosi, uint8_t miso)
{
uint32_t spiGpioCfg = 0;
spiGpioCfg |= (clk << 16);
spiGpioCfg |= (mosi << 8);
spiGpioCfg |= (miso);
return (spiGpioCfg);
}
spi_master_get_gpio_cfg(WICED_P07, WICED_P06, WICED_P16),
// configure led strip
wiced_hal_gpio_select_function(WICED_P06, WICED_SPI_1_MOSI);
wiced_hal_gpio_select_function(WICED_P07, WICED_SPI_1_CLK);
wiced_hal_pspi_reset(SPI1);
wiced_hal_pspi_init(
SPI1,
SPI_MASTER,
0,
spi_master_get_gpio_cfg(WICED_P07, WICED_P06, WICED_P16),
2.4*1000000,
SPI_MSB_FIRST,
SPI_SS_ACTIVE_LOW,
SPI_MODE_0,
WICED_P38
);
It produces the same oscillator results as I showed above. The clock signal from P07 is correct. While the MOSI data from P06 is not 0x55.