external lna control

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AaHo_4159591
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Hi there, we are looking at the fine print on the interface to our external RF front end. In the architecture reference manual section 42.2.7 it has the following description of Rx enable:

>       • Rx ENABLE

>

> This signal is needed to choose between the bypass path and LNA path. This signal will be ON during reception and OFF when the receiver is OFF. The polarity of this signal will be configurable through the LNA_CTRL_POL bit in the BLE_BLESS_EXT_PA_LNA_CTRL register.

Our external RF front end needs an explicit signal to switch in the rx path. My interpretation of the above is that this signal only turns on when the LNA is selected AND the receiver is on? Will the the BLESS sometimes receive without the LNA as part of the AGC loop? Or is the LNA selection only controlled by the ENABLE_EXT_PA_LNA bit? Is this signal always valid to turn on the LNA? If so, why the verbiage about the bypass path?

cheers,

Aaron

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1 Solution
Yugandhar
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500 solutions authored 1000 replies posted 5 likes given

Hello Aaron,

Rx enable signal is needed to choose between the bypass path and LNA path. During reception, LNA is enabled with normal polarity and LNA is disabled with inverse polarity and uses the bypass path. The polarity of this signal will be configurable through the LNA_CTRL_POL bit in the BLE_BLESS_EXT_PA_LNA_CTRL register.

The ENABLE_EXT_PA_LNA bit in the BLE_BLESS_EXT_PA_LNA_CTRL register is the control for external PA/LNA control. When this bit is set to 1, enables the external PA & LNA.

Thanks,

P Yugandhar.

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3 Replies
Yugandhar
Moderator
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500 solutions authored 1000 replies posted 5 likes given

Hello Aaron,

Rx enable signal is needed to choose between the bypass path and LNA path. During reception, LNA is enabled with normal polarity and LNA is disabled with inverse polarity and uses the bypass path. The polarity of this signal will be configurable through the LNA_CTRL_POL bit in the BLE_BLESS_EXT_PA_LNA_CTRL register.

The ENABLE_EXT_PA_LNA bit in the BLE_BLESS_EXT_PA_LNA_CTRL register is the control for external PA/LNA control. When this bit is set to 1, enables the external PA & LNA.

Thanks,

P Yugandhar.

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Ok so correct me if I'm wrong, but this means  there will be cases where the chip is trying to receive and RX_ENABLE is low because it wants the bypass path (presumably because the AGC wants less gain). Also CHIP_ENABLE will be low in this case.

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Hello Aaron,

If we enable the external LNA configuration then during reception RX_ENABLE signal will be always high it won't go to low.

The polarity of this signal is configurable and can be set in the EXT_PA_LNA_CTRL register by using Cy_BLE_ConfigureExtPA() API.

Thanks,

P Yugandhar.

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