Problem programming of some locations within pages of the S25FL256L device

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PeSt_3919641
Level 2
Level 2

We are interfacing a S25FL256L with a STM32L476 and have seen an unusual error case. We can erase the 4 K sector and read back the content of 0xFF in all locations. When programming the pages we can program 252 bytes but there are two failure modes with the other four bytes. No matter what I try to write location 1,2,3 they are read back as 0x00. The data in location 0 & 4-254 all store the values properly. The second failure mode is at address 255, the byte does not get programmed and stays at 0x255.

I have seen this with all pages I have tried. I have seen this same behavior both when programming all 256 bytes in one command or breaking it up into smaller  using the 0x12 PAGE_PROG_CMD.

page 1     ERASED 

: address data :

000 255 : 001 255 : 002 255 : 003 255 : 004 255 : 005 255 : 006 255 : 007 255 : 008 255 : 009 255 : 010 255 : 011 255 : 012 255 : 013 255 : 014 255 : 015 255 : 016 255 : 017 255 : 018 255 : 019 255 : 020 255 : 021 255 : 022 255 : 023 255 : 024 255 : 025 255 : 026 255 : 027 255 : 028 255 : 029 255 : 030 255 : 031 255 : 032 255 : 033 255 : 034 255 : 035 255 : 036 255 : 037 255 : 038 255 : 039 255 : 040 255 : 041 255 : 042 255 : 043 255 : 044 255 : 045 255 : 046 255 : 047 255 : 048 255 : 049 255 : 050 255 : 051 255 : 052 255 : 053 255 : 054 255 : 055 255 : 056 255 : 057 255 : 058 255 : 059 255 : 060 255 : 061 255 : 062 255 : 063 255 : 064 255 : 065 255 : 066 255 : 067 255 : 068 255 : 069 255 : 070 255 : 071 255 : 072 255 : 073 255 : 074 255 : 075 255 : 076 255 : 077 255 : 078 255 : 079 255 : 080 255 : 081 255 : 082 255 : 083 255 : 084 255 : 085 255 : 086 255 : 087 255 : 088 255 : 089 255 : 090 255 : 091 255 : 092 255 : 093 255 : 094 255 : 095 255 : 096 255 : 097 255 : 098 255 : 099 255 : 100 255 : 101 255 : 102 255 : 103 255 : 104 255 : 105 255 : 106 255 : 107 255 : 108 255 : 109 255 : 110 255 : 111 255 : 112 255 : 113 255 : 114 255 : 115 255 : 116 255 : 117 255 : 118 255 : 119 255 : 120 255 : 121 255 : 122 255 : 123 255 : 124 255 : 125 255 : 126 255 : 127 255 : 128 255 : 129 255 : 130 255 : 131 255 : 132 255 : 133 255 : 134 255 : 135 255 : 136 255 : 137 255 : 138 255 : 139 255 : 140 255 : 141 255 : 142 255 : 143 255 : 144 255 : 145 255 : 146 255 : 147 255 : 148 255 : 149 255 : 150 255 : 151 255 : 152 255 : 153 255 : 154 255 : 155 255 : 156 255 : 157 255 : 158 255 : 159 255 : 160 255 : 161 255 : 162 255 : 163 255 : 164 255 : 165 255 : 166 255 : 167 255 : 168 255 : 169 255 : 170 255 : 171 255 : 172 255 : 173 255 : 174 255 : 175 255 : 176 255 : 177 255 : 178 255 : 179 255 : 180 255 : 181 255 : 182 255 : 183 255 : 184 255 : 185 255 : 186 255 : 187 255 : 188 255 : 189 255 : 190 255 : 191 255 : 192 255 : 193 255 : 194 255 : 195 255 : 196 255 : 197 255 : 198 255 : 199 255 : 200 255 : 201 255 : 202 255 : 203 255 : 204 255 : 205 255 : 206 255 : 207 255 : 208 255 : 209 255 : 210 255 : 211 255 : 212 255 : 213 255 : 214 255 : 215 255 : 216 255 : 217 255 : 218 255 : 219 255 : 220 255 : 221 255 : 222 255 : 223 255 : 224 255 : 225 255 : 226 255 : 227 255 : 228 255 : 229 255 : 230 255 : 231 255 : 232 255 : 233 255 : 234 255 : 235 255 : 236 255 : 237 255 : 238 255 : 239 255 : 240 255 : 241 255 : 242 255 : 243 255 : 244 255 : 245 255 : 246 255 : 247 255 : 248 255 : 249 255 : 250 255 : 251 255 : 252 255 : 253 255 : 254 255 : 255 255 :

page 1    Written with pattern 255-0

000 255 : 001 000 : 002 000 : 003 000 : 004 251 : 005 250 : 006 249 : 007 248 : 008 247 : 009 246 : 010 245 : 011 244 : 012 243 : 013 242 : 014 241 : 015 240 : 016 239 : 017 238 : 018 237 : 019 236 : 020 235 : 021 234 : 022 233 : 023 232 : 024 231 : 025 230 : 026 229 : 027 228 : 028 227 : 029 226 : 030 225 : 031 224 : 032 223 : 033 222 : 034 221 : 035 220 : 036 219 : 037 218 : 038 217 : 039 216 : 040 215 : 041 214 : 042 213 : 043 212 : 044 211 : 045 210 : 046 209 : 047 208 : 048 207 : 049 206 : 050 205 : 051 204 : 052 203 : 053 202 : 054 201 : 055 200 : 056 199 : 057 198 : 058 197 : 059 196 : 060 195 : 061 194 : 062 193 : 063 192 : 064 191 : 065 190 : 066 189 : 067 188 : 068 187 : 069 186 : 070 185 : 071 184 : 072 183 : 073 182 : 074 181 : 075 180 : 076 179 : 077 178 : 078 177 : 079 176 : 080 175 : 081 174 : 082 173 : 083 172 : 084 171 : 085 170 : 086 169 : 087 168 : 088 167 : 089 166 : 090 165 : 091 164 : 092 163 : 093 162 : 094 161 : 095 160 : 096 159 : 097 158 : 098 157 : 099 156 : 100 155 : 101 154 : 102 153 : 103 152 : 104 151 : 105 150 : 106 149 : 107 148 : 108 147 : 109 146 : 110 145 : 111 144 : 112 143 : 113 142 : 114 141 : 115 140 : 116 139 : 117 138 : 118 137 : 119 136 : 120 135 : 121 134 : 122 133 : 123 132 : 124 131 : 125 130 : 126 129 : 127 128 : 128 127 : 129 126 : 130 125 : 131 124 : 132 123 : 133 122 : 134 121 : 135 120 : 136 119 : 137 118 : 138 117 : 139 116 : 140 115 : 141 114 : 142 113 : 143 112 : 144 111 : 145 110 : 146 109 : 147 108 : 148 107 : 149 106 : 150 105 : 151 104 : 152 103 : 153 102 : 154 101 : 155 100 : 156 099 : 157 098 : 158 097 : 159 096 : 160 095 : 161 094 : 162 093 : 163 092 : 164 091 : 165 090 : 166 089 : 167 088 : 168 087 : 169 086 : 170 085 : 171 084 : 172 083 : 173 082 : 174 081 : 175 080 : 176 079 : 177 078 : 178 077 : 179 076 : 180 075 : 181 074 : 182 073 : 183 072 : 184 071 : 185 070 : 186 069 : 187 068 : 188 067 : 189 066 : 190 065 : 191 064 : 192 255 : 193 255 : 194 255 : 195 060 : 196 059 : 197 058 : 198 057 : 199 056 : 200 055 : 201 054 : 202 053 : 203 052 : 204 051 : 205 050 : 206 049 : 207 048 : 208 047 : 209 046 : 210 045 : 211 044 : 212 043 : 213 042 : 214 041 : 215 040 : 216 039 : 217 038 : 218 037 : 219 036 : 220 035 : 221 034 : 222 033 : 223 032 : 224 031 : 225 030 : 226 029 : 227 028 : 228 027 : 229 026 : 230 025 : 231 024 : 232 023 : 233 022 : 234 021 : 235 020 : 236 019 : 237 018 : 238 017 : 239 016 : 240 015 : 241 014 : 242 013 : 243 012 : 244 011 : 245 010 : 246 009 : 247 008 : 248 007 : 249 006 : 250 005 : 251 004 : 252 003 : 253 002 : 254 001 : 255 255 :

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1 Solution

I found an error in my code that was causing the multiple write errors, so for the present I have the functionality I need. I will revisit the single spi command 0x13 later.

View solution in original post

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16 Replies
Apurva_S
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi Peter,

Thank you for contacting Cypress.

I have a few questions -

  1. Are you polling the WIP bit after completing the page program operation? You need to poll the WIP bit of the status register to check its status. The status of the bit indicates whether the device has finished programming or not.
  2. Did you try to read SR2 register after program operation? Are any of the error bits getting set?
  3. Which command are you using to read the data back? Are there any latency cycles required for that command? If yes, are you providing the required number of latency cycles?
  4. Are you trying to record the SPI signals for the write and read operation using logic analyzer? If yes, Can you share the waveforms with us?
  5. Can you share your code with us or tell us the exact sequence of commands that you are following?
  6. How many devices are showing this behavior?

Best Regards,

Apurva

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Reply below in red

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Hi Peter,

I cannot see your answers. Instead of editing the mail thread, could you please post your answers again in the forum?

Best Regards,

Apurva

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  1. Are you polling the WIP bit after completing the page program operation? You need to poll the WIP bit of the status register to check its status. The status of the bit indicates whether the device has finished programming or not. Write sequence:  write enable 0x06 , page program 0x12 + data to program, wait for TX complete to come back from ISR, then poll for completion 0x05
  2. Did you try to read SR2 register after program operation? Are any of the error bits getting set? Will add this today
  3. Which command are you using to read the data back? Are there any latency cycles required for that command? If yes, are you providing the required number of latency cycles? Read sequence: set dummy cycles to 8, read command 0x13 , wait for the cmd complete to come back from ISR , wait for RX complete to come back from ISR
  4. Are you trying to record the SPI signals for the write and read operation using logic analyzer? If yes, Can you share the waveforms with us? Analyzer is being delivered today
  5. Can you share your code with us or tell us the exact sequence of commands that you are following? See above
  6. How many devices are showing this behavior? Two out of two so far. These are limited prototypes so I can try a third but have not received it yet.

I scaled back my code after having problems to initially use single spi lane but would like to return to trying the Quad operations once the single lane is functional. Is there a white paper describing the correct command sequences required for access in Quad mode and can you still poll in single for status etc?

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Hi Peter,

Thank you for the answers.

  1. In the command sequence mentioned by you, I see that you are using the 4PP and 4READ commands. In your previous reply you have not mentioned how you are sending the address after the page program and read command, but since you are able to read the correct data after the erase operation, I am assuming you are sending the address correctly.
  2. Since you are able to read back the erased page correctly, SPI communication should be fine. The problem should be with the write operation. We will be needing the the logic analyzer waveforms for the write and read operation for better understanding. Please provide us the waveforms when you get access to the analyzer.
  3. I also notice that you have written that you are setting dummy cycles to 8. The default value of dummy cycles is already set to 8 in configuration register 3, and also 4READ (13h) command does not need any dummy cycles. Then, could you please clarify what is the purpose of setting dummy cycles to 8?
  4. The command set for the quad mode is different. But the sequence of sending these commands and receiving the output data remains the same for Single SPI and Quad mode. You can go through the command descriptions mentioned in the datasheet to get a better understanding of the quad mode commands. Please let me know if you have any confusion in this regard.

Best Regards,

Apurva

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Can you decode a xlp file for the analyzer (GoLogicXL project) or do you want snapshots from the transactions. Also what it the file size restrictions on uploading data.

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I am trying to get the WRR sequence to work trying to enable 4 byte address mode and quad mode. As I understand it from the spec the sequence is

WREN WRENV WREN WRR 0x02 0x02 0x61 0x78

That has not worked. I tried to attach the analyzer file but the tool will not allow it.

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This is the write sequence using the analyzer This test run I was able to get more of the data by changing from 4 64 byte writes to a single 256 byte write to the page. The read back starts at 254 not 255 whichh was the first byte written.

000 254 : 001 253 : 002 252 : 003 251 : 004 250 : 005 249 : 006 248 : 007 247 : 008 246 : 009 245 : 010 244 : 011 243 : 012 242 : 013 241 : 014 240 : 015 239 : 016 238 : 017 237 : 018 236 : 019 235 : 020 234 : 021 233 : 022 232 : 023 231 : 024 230 : 025 229 : 026 228 : 027 227 : 028 226 : 029 225 : 030 224 : 031 223 : 032 222 : 033 221 : 034 220 : 035 219 : 036 218 : 037 217 : 038 216 : 039 215 : 040 214 : 041 213 : 042 212 : 043 211 : 044 210 : 045 209 : 046 208 : 047 207 : 048 206 : 049 205 : 050 204 : 051 203 : 052 202 : 053 201 : 054 200 : 055 199 : 056 198 : 057 197 : 058 196 : 059 195 : 060 194 : 061 193 : 062 192 : 063 191 : 064 190 : 065 189 : 066 188 : 067 187 : 068 186 : 069 185 : 070 184 : 071 183 : 072 182 : 073 181 : 074 180 : 075 179 : 076 178 : 077 177 : 078 176 : 079 175 : 080 174 : 081 173 : 082 172 : 083 171 : 084 170 : 085 169 : 086 168 : 087 167 : 088 166 : 089 165 : 090 164 : 091 163 : 092 162 : 093 161 : 094 160 : 095 159 : 096 158 : 097 157 : 098 156 : 099 155 : 100 154 : 101 153 : 102 152 : 103 151 : 104 150 : 105 149 : 106 148 : 107 147 : 108 146 : 109 145 : 110 144 : 111 143 : 112 142 : 113 141 : 114 140 : 115 139 : 116 138 : 117 137 : 118 136 : 119 135 : 120 134 : 121 133 : 122 132 : 123 131 : 124 130 : 125 129 : 126 128 : 127 127 : 128 126 : 129 125 : 130 124 : 131 123 : 132 122 : 133 121 : 134 120 : 135 119 : 136 118 : 137 117 : 138 116 : 139 115 : 140 114 : 141 113 : 142 112 : 143 111 : 144 110 : 145 109 : 146 108 : 147 107 : 148 106 : 149 105 : 150 104 : 151 103 : 152 102 : 153 101 : 154 100 : 155 099 : 156 098 : 157 097 : 158 096 : 159 095 : 160 094 : 161 093 : 162 092 : 163 091 : 164 090 : 165 089 : 166 088 : 167 087 : 168 086 : 169 085 : 170 084 : 171 083 : 172 082 : 173 081 : 174 080 : 175 079 : 176 078 : 177 077 : 178 076 : 179 075 : 180 074 : 181 073 : 182 072 : 183 071 : 184 070 : 185 069 : 186 068 : 187 067 : 188 066 : 189 065 : 190 064 : 191 063 : 192 062 : 193 061 : 194 060 : 195 059 : 196 058 : 197 057 : 198 056 : 199 055 : 200 054 : 201 053 : 202 052 : 203 051 : 204 050 : 205 049 : 206 048 : 207 047 : 208 046 : 209 045 : 210 044 : 211 043 : 212 042 : 213 041 : 214 040 : 215 039 : 216 038 : 217 037 : 218 036 : 219 035 : 220 034 : 221 033 : 222 032 : 223 031 : 224 030 : 225 029 : 226 028 : 227 027 : 228 026 : 229 025 : 230 024 : 231 023 : 232 022 : 233 021 : 234 020 : 235 019 : 236 018 : 237 017 : 238 016 : 239 015 : 240 014 : 241 013 : 242 012 : 243 011 : 244 010 : 245 009 : 246 008 : 247 007 : 248 006 : 249 005 : 250 004 : 251 003 : 252 002 : 253 001 : 254 000 : 255 255 :

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AVHo_4385401
Level 1
Level 1

Perhaps an example will come in handy. Bitbucket

Free programming of any reasonable number of bytes at a time (no more than the capacity of a flash card). The physical memory address is 0x90000000, the address parameter for transmission to the function corresponds to the real one. Size of data in bytes, data array arbitrary format - the address of the array is important.

Before erasing a sector, data is read from flash memory, changed from the required address, and saved back to flash memory. Thus, you can not control the exact addresses - excluding errors.

It makes no sense to publish the contents of your flash memory. A write operation is either success or error.

S25FL256S have a difference in sector size and available control commands. By the way - it makes no sense to program qspi mode every time, first you need to check the status.

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Hi Peter,

Thank you for your reply.

1. We tried to download the software for GoLogicXL from the following link - https://www.nci-usa.com/mainsite/logic-analyzer-downloads-gologicxl/ , but the installation was not successful. We will have to reply on screenshots.

2. The maximum size of attachment allowed is 878.9MB.

3. Regarding enabling 4 byte address mode and QUAD mode, you need to program the CR1NV[1] and CR2NV[1] bits of Configuration Register 1 and Configuration Register 2. The correct sequence of commands for WRR command is -

  • Make CS LOW
  • Send WREN command
  • Make CS HIGH
  • Make CS LOW
  • Send WRR command
  • Send SR1 value
  • Send CR1 value
  • Send CR2 value
  • Send CR3 value
  • Make CS HIGH
  • Read Status Register 1 to poll WIP bit. Repeat this step till WIP goes LOW. This will indicate succesful completion of WRR operation.

Now, few things to be kept in mind while programming SR1 is that you don't change any of the previously set SR1 bits. A better idea would be to read SR1 value after WREN command and then program the same thing back since we don't want to change any bits in SR1. Since we don't want to change any thing in CR3 you can skip sending that byte of data and CS HIGH immediately after sending CR2 value. Based on you reply, I am assuming that 0x02 0x02 0x61 0x78 these are the values you are writing to SR1, CR1, CR2, CR3 respectively. I would like to point out that CR2NV[0] bit is RFU with the default value of 0. as mentioned in the explanation of WRR(01h) command in the datasheet RFU bits should be written as 0. Programming CR2NV with 0x61 will make it one. WRENV command is used when programming is performed on the Volatile counterpart of these registers, not required here as we are not writing to the Volatile counterparts of these registers.

4. Based on the waveform provided by you for Page Program operation, we can conclude that the program operation is correct. Could you please also provide a similar screenshot for your Read operation? Which command are you using for reading? Are you sending any dummy cycles?

Best Regards,

Apurva

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I did get the CRNV2 confused with CRV2 bit defines and once I fixed that I can get good looking quad data working, and the register value is coming back correct.

The test data set being used is 255->0

If I write the page in one command I can read back 254->0 and then a 255 at the end. I proved that this 255 is not in the same page but is the first value the adjacent page by programming the page 1 to all 0 and seeing the value read as location 255 of page change to 0. So my assumption is we are missing the first byte of the returned value. The behavior is the same if I use single PAGE_PROG_CMD   0x12   or quad PAGE_PROG_QUAD   0x34. The behavior is the same if I read with 0x13  or 0x6c . I am using 8 dummy bytes for single and 10 for quad read. Can you suggest my next step to try to troubleshoot this issue.

As a separate problem if I try and do the writes as 4 64 byte writes I still see the first three locations coming back as 0. But this is a lower priority , If I can get the 256 byte access I can put the device in use and can work on the rest after.

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After looking at the spec again I found I had the wrong dummy count for the 0x6C quad read. Once I changed that to 8 the missing first byte is not read. I am not sure why I am having the problem in single read mode or the multiple writes but there is progress. 

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I found an error in my code that was causing the multiple write errors, so for the present I have the functionality I need. I will revisit the single spi command 0x13 later.

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Hi Peter,

From your previous replies I can figure out that the 4QOR (6Ch) command is working fine without errors.

For the Single SPI READ (13h) command, I would like to point out that this command DOES NOT need any dummy cycles. In your previous reply you have mentioned that you have provided 8 dummy bytes(should be dummy cycles, I am assuming it is a typing mistake). You might be losing the first byte of data while providing the 8 dummy cycles, which is then leading to your code reading the first byte of the next page.

Best Regards,

Apurva

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Hi ApurvaS_36, but I'm not PeSt_3919641.

You need to get Peter to show his program code.

You need to find out the full name of the used external memory, as well as the full name of the microcontroller chip. From these clarifications, program requirements may change.

For example: it is impossible to rewrite a small part of the external memory data - if the sector size of the external memory is larger than the size of the internal RAM of the MK. A complete rewrite is possible, with the loss of old data. This imposes restrictions on working with external memory as an active data storage device. In this case, it does not make sense to create program recording functions. Here you need an external hardware programmer.

My program code is working. I provided it as a template. For use with another ST microprocessor, a number of parameters need to be changed. The qspi peripheral block will have similar settings, but the rest of the environment may change slightly.

However, the very procedure for using commands when working with external memory will be useful for Peter as a template.

But I'm not sure that Peter saw the link.

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