DMA TD Destination Address Reset

[jaro_4346051]

Hello, I currently have a DMA tied to the Rx of a UART in which for each received byte, the DMA will store the byte into a SRAM buffer, incrementing the address of this destination buffer. Because the CPU will be parsing the information as it comes in, I want to be able to reset the destination SRAM buffer address of the DMA so it can start again from the beginning whenever the CPU decides to.

The posting here is very similar to what I am trying to accomplish where I would need to setup a nested DMA.

Reset DMA TD state

I am trying to acquire more clarity on how this may be done. I was able to the find the TDMEM registers, however, I did not find the xfrcnt [0:12] register.

Please let me know thank you.

[Hari]

Hello jaro_4346051​

You can refer the PSoC 5 LP registers trm for more details on xfrcnt register.

Thanks and regards

Harigovind

[Hari · Accepted solution]

Hello jaro_4346051​

You can refer the PSoC 5 LP registers trm for more details on xfrcnt register.

Thanks and regards

Harigovind