Impedance Meter

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DaCl_2327481
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There used to be a way with the PSoC 3 and PSoC5 to create an impedance meter.

Shown here:

PSoC Today: Impedance Meter information and project (updated to PSoC Creator 2.2 and Psoc 3/5LP)

Is this possible with any of the PSoC 6 platforms. I tried to lay out all the components via the editor and the only thing that looks like a deal breaker is that there is no delta sigma ADC in the PSoC 6 that I am designing for.

Anyone have any idea if this type of design is still possible? Is there a suitable replacement for the Delta Sigma?

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post from RiMo_301056

What Chris added to the DelSig ADC was a logic input to invert the polarity of the signal.

In the newer Delta Sigma ADC component, this input can be activated in the configuration options of the component, as BoTa_264741 correctly stated.

In Chris' original project, this input was driven by a square (logic) signal with the same frequency as the sine wave applied by the impedance meter to the external component (D.U.T.).

This results in "homodyning" the measured current with itself, therefore shifting the frequency of the result to DC.

The Delta Sigma ADC does the rest, as it widely oversamples the signal and low-pass filters it. No anti-aliasing nor a sample & hold circuit are required!

Using other types of ADCs (such as those found on the PSoC6) will probably need more external pre- and post-processing.

I really appreciated the great engineering ideas behind Chris' project !

Since one of the two mixing signals is a square wave, you could implement that function externally without using an expensive linear multiplier (AD630), but simply with some analog switches (DG412 or similar) that switch between the analog input signal and an inverted copy of it.

Just some personal remarks on Chris Kees Impedance Meter project:

The project is full of beautiful ideas taking advantage of the PSoC architecture. For example the synthesis of the sine excitation using a lookup table and DMA, dimensioned in such a way that DMA blocks terminate exactly after each quarter sine wave. The resulting DMA request signals are then used to generate synchronized square wave I and Q copies of the sine wave, used to drive the modulator input of the DelSig ADC and therefore extract either the I or Q components of the measure.

I developed a project around Chris original one and just improved some details, to produce a smoother sine wave and whose amplitude does not change much with frequency. The accuracy of the impedance meter is impressive (comparable to expensive laboratory equipment).

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ShipingW_81
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post from DaCl_2327481

Is Chris Kees still around to ask how he would accomplish synchronous sampling with the PSoC 6?

I don't think it is just a matter of having the delta sigma. I am unsure if the way you would have to sample with the SAR would even allow for the correct type of acquisition. He had to create a new component to sit on top of the Del-sig to make it even work on the old project. That is the type of analysis I want done to find out if I should give up on the PSoC 6 and move to the nRF52 and some off-device chip.

This is for a pretty big project (large volume of components sold) so it would be good to have someone seriously look into this.

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post from  BoTa_264741  -

DaCl,

Chris Keeser departed from Cypress years ago, and, as per the Linked-in, works now at Facebook.

The Chris'es Modulator add-on for Delta-Sigma ADC is now a standard built-in feature of the DelSig-ADC in PSoC5LP.

If you don't want to use PSoC5, the off-chip modulator is the only option, my guess... AD630 is quite expensive, but one can built a modulator based on a Tayloe detector for a dollar (Google "Tayloe mixer"):

https://wparc.us/presentations/SDR-2-19-2013/Tayloe_mixer_x3a.pdf

  /odissey1

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post from RiMo_301056

What Chris added to the DelSig ADC was a logic input to invert the polarity of the signal.

In the newer Delta Sigma ADC component, this input can be activated in the configuration options of the component, as BoTa_264741 correctly stated.

In Chris' original project, this input was driven by a square (logic) signal with the same frequency as the sine wave applied by the impedance meter to the external component (D.U.T.).

This results in "homodyning" the measured current with itself, therefore shifting the frequency of the result to DC.

The Delta Sigma ADC does the rest, as it widely oversamples the signal and low-pass filters it. No anti-aliasing nor a sample & hold circuit are required!

Using other types of ADCs (such as those found on the PSoC6) will probably need more external pre- and post-processing.

I really appreciated the great engineering ideas behind Chris' project !

Since one of the two mixing signals is a square wave, you could implement that function externally without using an expensive linear multiplier (AD630), but simply with some analog switches (DG412 or similar) that switch between the analog input signal and an inverted copy of it.

Just some personal remarks on Chris Kees Impedance Meter project:

The project is full of beautiful ideas taking advantage of the PSoC architecture. For example the synthesis of the sine excitation using a lookup table and DMA, dimensioned in such a way that DMA blocks terminate exactly after each quarter sine wave. The resulting DMA request signals are then used to generate synchronized square wave I and Q copies of the sine wave, used to drive the modulator input of the DelSig ADC and therefore extract either the I or Q components of the measure.

I developed a project around Chris original one and just improved some details, to produce a smoother sine wave and whose amplitude does not change much with frequency. The accuracy of the impedance meter is impressive (comparable to expensive laboratory equipment).