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PSoC® Creator™ Component Datasheet Counter 3.0 says:
clock input for FF type is "Limited to digital clocks in the clock system" (table at top of page 2)
which of the various system wide clocks:
XTAL, XTAL 32kHz, Digital Signal, USB_CLK,ILO, IMO, PLL_OUT, Master_Clk, BUS_CLK(CPU)
is included in "digital clocks in the clock system"
Solved! Go to Solution.
- Labels:
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PSoC 5 Device Programming
-
PSoC 5LP
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Please refer following document.
https://www.cypress.com/documentation/technical-reference-manuals/psoc-5lp-architecture-trm
PSoC 5LP Architecture TRM, Document No. 001-78426
There are two groups of clock dividers, Digital and Analog.
When a Clock is put on the PSoC Creator's schematic,
the clock domain is selected from DIGITAL and ANALOG
Once the clock is attached to the Counter component,
the clock domain is fixed to DIGITAL.
If you didn't see any error on PSoC Creator, the clock can be used as the FF-type Counter clock.
Regards,
Noriaki
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Please refer following document.
https://www.cypress.com/documentation/technical-reference-manuals/psoc-5lp-architecture-trm
PSoC 5LP Architecture TRM, Document No. 001-78426
There are two groups of clock dividers, Digital and Analog.
When a Clock is put on the PSoC Creator's schematic,
the clock domain is selected from DIGITAL and ANALOG
Once the clock is attached to the Counter component,
the clock domain is fixed to DIGITAL.
If you didn't see any error on PSoC Creator, the clock can be used as the FF-type Counter clock.
Regards,
Noriaki
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your comments have cleared up my problem
i wasn't using the clocks correctly
thank you