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In ARM CortexM architecture, is it interrupt safe (atomic) to update uint16_t, uint32_t variables?
I'm guessing that __disable_irq() does return previous interrupt status, is that correct? Thank you.
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if you use "__disable_irq()", it will close the interrupt, but it will wait the interrupt handler to finish run, then return.
But if you use "disable_irq_nosync", it will return to the previous status.
It is safe to update the uint16_t, uint32_t variables.
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if you use "__disable_irq()", it will close the interrupt, but it will wait the interrupt handler to finish run, then return.
But if you use "disable_irq_nosync", it will return to the previous status.
It is safe to update the uint16_t, uint32_t variables.
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If you are using PSoC Creator, Following context can be used.
void xx_isr(void) {
uint32_t status = Cy_SysLib_EnterCriticalSection();
count++;
Cy_SysLib_ExitCriticalSection(status);
}
The function Cy_SysLib_EnterCriticalSection() disables interrupts and returns previous status.
The function Cy_SysLib_ExitCriticalSection() returns to the previous state using the saved status.
It is effective for non-atomic value like uint64_t
17:main_cm4.c **** uint32_t status = Cy_SysLib_EnterCriticalSection();
38 0002 FFF7FEFF bl Cy_SysLib_EnterCriticalSection
39 .LVL0:
18:main_cm4.c **** count++;
41 0006 0549 ldr r1, .L3
42 0008 D1E90023 ldrd r2, [r1]
43 000c 0132 adds r2, r2, #1
44 000e 43F10003 adc r3, r3, #0
45 0012 C1E90023 strd r2, [r1]
19:main_cm4.c **** Cy_SysLib_ExitCriticalSection(status);
47 0016 FFF7FEFF bl Cy_SysLib_ExitCriticalSection
Regards,
Noriaki